CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 390793 | 1 | T70 | 1 | T71 | 2 | T77 | 361 | ||||
rising | 390928 | 1 | T70 | 1 | T71 | 2 | T77 | 362 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1094221 | 1 | T70 | 2 | T71 | 4 | T77 | 1206 | ||||
auto[1] | 9510815 | 1 | T70 | 1454 | T71 | 8320 | T72 | 274 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 339747 | 1 | T70 | 3 | T71 | 2 | T77 | 377 | ||||
rising | 339831 | 1 | T70 | 3 | T71 | 2 | T76 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1209554 | 1 | T70 | 6 | T71 | 4 | T76 | 2 | ||||
auto[1] | 10221851 | 1 | T70 | 1414 | T71 | 8392 | T72 | 194 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 696245 | 1 | T70 | 2 | T77 | 949 | T241 | 77 | ||||
rising | 696315 | 1 | T70 | 2 | T77 | 949 | T241 | 77 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1103129 | 1 | T70 | 4 | T77 | 1254 | T241 | 104 | ||||
auto[1] | 9575411 | 1 | T70 | 1350 | T71 | 8318 | T72 | 232 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6374 | 1 | T71 | 90 | T78 | 1 | T77 | 1 | ||||
rising | 6410 | 1 | T71 | 91 | T78 | 1 | T77 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 166871 | 1 | T70 | 47 | T71 | 157 | T72 | 6 | ||||
auto[1] | 11738 | 1 | T71 | 343 | T78 | 1 | T77 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4146 | 1 | T429 | 1 | T386 | 1 | T662 | 216 | ||||
rising | 4171 | 1 | T429 | 1 | T386 | 1 | T662 | 216 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172068 | 1 | T70 | 32 | T72 | 6 | T78 | 16 | ||||
auto[1] | 6539 | 1 | T429 | 1 | T386 | 1 | T662 | 435 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3886 | 1 | T71 | 42 | T78 | 1 | T386 | 4 | ||||
rising | 3918 | 1 | T71 | 42 | T78 | 1 | T386 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185572 | 1 | T70 | 26 | T71 | 389 | T72 | 2 | ||||
auto[1] | 4256 | 1 | T71 | 47 | T78 | 1 | T386 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7684 | 1 | T71 | 66 | T151 | 107 | T77 | 1 | ||||
rising | 7733 | 1 | T71 | 67 | T151 | 107 | T77 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168168 | 1 | T70 | 26 | T71 | 98 | T72 | 3 | ||||
auto[1] | 20371 | 1 | T71 | 415 | T151 | 254 | T77 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3933 | 1 | T497 | 1 | T386 | 11 | T532 | 1 | ||||
rising | 3957 | 1 | T497 | 1 | T386 | 11 | T532 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182558 | 1 | T70 | 18 | T72 | 4 | T78 | 25 | ||||
auto[1] | 4464 | 1 | T497 | 1 | T386 | 11 | T532 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6524 | 1 | T71 | 99 | T429 | 5 | T427 | 1 | ||||
rising | 6556 | 1 | T71 | 100 | T429 | 5 | T427 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172208 | 1 | T70 | 23 | T71 | 162 | T72 | 11 | ||||
auto[1] | 11845 | 1 | T71 | 321 | T429 | 5 | T427 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5641 | 1 | T71 | 110 | T429 | 15 | T386 | 1 | ||||
rising | 5682 | 1 | T71 | 111 | T429 | 15 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 186257 | 1 | T70 | 26 | T71 | 169 | T72 | 8 | ||||
auto[1] | 11644 | 1 | T71 | 344 | T429 | 15 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5318 | 1 | T386 | 2 | T532 | 1 | T507 | 2 | ||||
rising | 5354 | 1 | T386 | 2 | T532 | 1 | T507 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178307 | 1 | T70 | 35 | T72 | 3 | T78 | 15 | ||||
auto[1] | 10992 | 1 | T386 | 2 | T532 | 1 | T507 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6348 | 1 | T429 | 132 | T474 | 1 | T386 | 2 | ||||
rising | 6389 | 1 | T72 | 1 | T429 | 132 | T474 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185548 | 1 | T70 | 21 | T72 | 4 | T78 | 21 | ||||
auto[1] | 13274 | 1 | T72 | 1 | T429 | 288 | T474 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5366 | 1 | T386 | 3 | T532 | 1 | T506 | 3 | ||||
rising | 5399 | 1 | T386 | 3 | T532 | 1 | T506 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184297 | 1 | T70 | 21 | T72 | 7 | T78 | 22 | ||||
auto[1] | 8499 | 1 | T386 | 3 | T532 | 1 | T506 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4917 | 1 | T429 | 1 | T386 | 5 | T663 | 2 | ||||
rising | 4939 | 1 | T429 | 1 | T386 | 5 | T663 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181427 | 1 | T70 | 29 | T72 | 9 | T78 | 23 | ||||
auto[1] | 6340 | 1 | T429 | 1 | T386 | 5 | T663 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 14966 | 1 | T71 | 47 | T498 | 29 | T389 | 32 | ||||
rising | 15003 | 1 | T71 | 47 | T498 | 29 | T389 | 32 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1466583 | 1 | T70 | 188 | T71 | 1004 | T72 | 30 | ||||
auto[1] | 15610 | 1 | T71 | 50 | T498 | 32 | T389 | 36 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7206 | 1 | T71 | 90 | T429 | 116 | T386 | 1 | ||||
rising | 7248 | 1 | T71 | 90 | T429 | 116 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 195965 | 1 | T70 | 37 | T71 | 161 | T72 | 1 | ||||
auto[1] | 16327 | 1 | T71 | 272 | T429 | 162 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7649 | 1 | T389 | 56 | T386 | 3 | T662 | 68 | ||||
rising | 7692 | 1 | T389 | 57 | T386 | 3 | T662 | 69 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168824 | 1 | T70 | 28 | T72 | 6 | T78 | 29 | ||||
auto[1] | 20948 | 1 | T389 | 381 | T386 | 3 | T662 | 397 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2307 | 1 | T429 | 1 | T386 | 3 | T506 | 3 | ||||
rising | 2328 | 1 | T429 | 1 | T386 | 3 | T506 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 194077 | 1 | T70 | 30 | T72 | 7 | T78 | 13 | ||||
auto[1] | 2452 | 1 | T429 | 1 | T386 | 3 | T506 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7880 | 1 | T389 | 96 | T474 | 1 | T386 | 2 | ||||
rising | 7915 | 1 | T389 | 97 | T474 | 1 | T386 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 170571 | 1 | T70 | 29 | T72 | 9 | T78 | 19 | ||||
auto[1] | 16683 | 1 | T389 | 359 | T474 | 1 | T386 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7713 | 1 | T497 | 1 | T427 | 1 | T386 | 2 | ||||
rising | 7751 | 1 | T497 | 1 | T427 | 1 | T386 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 173809 | 1 | T70 | 33 | T72 | 4 | T78 | 15 | ||||
auto[1] | 15491 | 1 | T497 | 1 | T427 | 1 | T386 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8322 | 1 | T497 | 1 | T429 | 109 | T386 | 6 | ||||
rising | 8371 | 1 | T497 | 1 | T429 | 109 | T386 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175307 | 1 | T70 | 21 | T72 | 6 | T78 | 25 | ||||
auto[1] | 18010 | 1 | T497 | 1 | T429 | 238 | T386 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4009 | 1 | T389 | 109 | T386 | 2 | T532 | 1 | ||||
rising | 4033 | 1 | T389 | 110 | T386 | 2 | T532 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 179707 | 1 | T70 | 25 | T72 | 3 | T78 | 19 | ||||
auto[1] | 5800 | 1 | T389 | 244 | T386 | 2 | T532 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2179 | 1 | T71 | 43 | T664 | 21 | T429 | 1 | ||||
rising | 2204 | 1 | T71 | 43 | T664 | 21 | T429 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185762 | 1 | T70 | 32 | T71 | 427 | T72 | 2 | ||||
auto[1] | 2310 | 1 | T71 | 46 | T664 | 21 | T429 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6772 | 1 | T386 | 1 | T503 | 121 | T532 | 1 | ||||
rising | 6805 | 1 | T386 | 1 | T503 | 121 | T532 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 170975 | 1 | T70 | 33 | T72 | 4 | T78 | 16 | ||||
auto[1] | 10776 | 1 | T386 | 1 | T503 | 140 | T532 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 43803 | 1 | T496 | 2544 | T511 | 829 | T513 | 1256 | ||||
rising | 43807 | 1 | T496 | 2545 | T511 | 828 | T513 | 1256 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 93899 | 1 | T496 | 5279 | T511 | 2013 | T513 | 2557 | ||||
auto[1] | 84839 | 1 | T496 | 4996 | T511 | 1559 | T513 | 2432 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 24682 | 1 | T496 | 1341 | T511 | 532 | T513 | 684 | ||||
rising | 24673 | 1 | T496 | 1340 | T511 | 532 | T513 | 684 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 148480 | 1 | T496 | 8700 | T511 | 2837 | T513 | 4168 | ||||
auto[1] | 30258 | 1 | T496 | 1575 | T511 | 735 | T513 | 821 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 24682 | 1 | T496 | 1341 | T511 | 532 | T513 | 684 | ||||
rising | 24673 | 1 | T496 | 1340 | T511 | 532 | T513 | 684 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 148480 | 1 | T496 | 8700 | T511 | 2837 | T513 | 4168 | ||||
auto[1] | 30258 | 1 | T496 | 1575 | T511 | 735 | T513 | 821 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3860 | 1 | T496 | 138 | T511 | 196 | T513 | 68 | ||||
rising | 3853 | 1 | T496 | 138 | T511 | 197 | T513 | 68 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 173371 | 1 | T496 | 10109 | T511 | 3263 | T513 | 4914 | ||||
auto[1] | 5367 | 1 | T496 | 166 | T511 | 309 | T513 | 75 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 107417 | 1 | T496 | 6 | T340 | 3 | T143 | 6023 | ||||
rising | 107437 | 1 | T496 | 6 | T340 | 3 | T143 | 6023 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 25051586 | 1 | T1 | 40828 | T2 | 4471 | T3 | 3805 | ||||
auto[1] | 624049 | 1 | T496 | 6 | T340 | 3 | T143 | 41214 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 44244 | 1 | T496 | 2552 | T511 | 852 | T513 | 1258 | ||||
rising | 44249 | 1 | T496 | 2552 | T511 | 851 | T513 | 1259 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 93736 | 1 | T496 | 5304 | T511 | 1932 | T513 | 2560 | ||||
auto[1] | 85002 | 1 | T496 | 4971 | T511 | 1640 | T513 | 2429 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 37708 | 1 | T496 | 2154 | T511 | 726 | T513 | 1020 | ||||
rising | 37713 | 1 | T496 | 2154 | T511 | 726 | T513 | 1019 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 125096 | 1 | T496 | 7235 | T511 | 2529 | T513 | 3556 | ||||
auto[1] | 53642 | 1 | T496 | 3040 | T511 | 1043 | T513 | 1433 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2116 | 1 | T71 | 20 | T389 | 26 | T429 | 44 | ||||
rising | 2134 | 1 | T71 | 20 | T389 | 26 | T429 | 44 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 187769 | 1 | T70 | 23 | T71 | 433 | T72 | 9 | ||||
auto[1] | 2225 | 1 | T71 | 20 | T389 | 29 | T429 | 48 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2811 | 1 | T71 | 62 | T386 | 1 | T503 | 27 | ||||
rising | 2832 | 1 | T71 | 62 | T386 | 1 | T503 | 27 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177855 | 1 | T70 | 25 | T71 | 913 | T72 | 2 | ||||
auto[1] | 3017 | 1 | T71 | 68 | T386 | 1 | T503 | 29 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6125 | 1 | T151 | 84 | T77 | 8 | T429 | 9 | ||||
rising | 6181 | 1 | T151 | 84 | T77 | 8 | T429 | 9 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 162399 | 1 | T70 | 25 | T72 | 8 | T78 | 21 | ||||
auto[1] | 23555 | 1 | T151 | 306 | T77 | 8 | T429 | 10 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7564 | 1 | T77 | 36 | T389 | 65 | T429 | 2 | ||||
rising | 7610 | 1 | T77 | 36 | T389 | 66 | T429 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172972 | 1 | T70 | 31 | T72 | 1 | T78 | 23 | ||||
auto[1] | 20327 | 1 | T77 | 39 | T389 | 395 | T429 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3152 | 1 | T497 | 1 | T389 | 29 | T386 | 1 | ||||
rising | 3176 | 1 | T497 | 1 | T389 | 29 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189148 | 1 | T70 | 29 | T72 | 7 | T78 | 21 | ||||
auto[1] | 3373 | 1 | T497 | 1 | T389 | 29 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7398 | 1 | T77 | 105 | T498 | 89 | T386 | 5 | ||||
rising | 7447 | 1 | T77 | 105 | T498 | 89 | T386 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169593 | 1 | T70 | 23 | T72 | 5 | T78 | 26 | ||||
auto[1] | 14474 | 1 | T77 | 178 | T498 | 280 | T386 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7932 | 1 | T429 | 7 | T505 | 1 | T386 | 4 | ||||
rising | 7972 | 1 | T72 | 1 | T429 | 7 | T505 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182247 | 1 | T70 | 31 | T72 | 2 | T78 | 16 | ||||
auto[1] | 14673 | 1 | T72 | 1 | T429 | 7 | T505 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6410 | 1 | T71 | 116 | T386 | 9 | T506 | 2 | ||||
rising | 6449 | 1 | T71 | 116 | T386 | 9 | T506 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193805 | 1 | T70 | 22 | T71 | 197 | T72 | 4 | ||||
auto[1] | 13967 | 1 | T71 | 370 | T386 | 10 | T506 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 22095 | 1 | T71 | 58 | T72 | 2 | T78 | 1 | ||||
rising | 22129 | 1 | T71 | 58 | T72 | 2 | T78 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1450334 | 1 | T70 | 230 | T71 | 992 | T72 | 32 | ||||
auto[1] | 23158 | 1 | T71 | 59 | T72 | 2 | T78 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8402 | 1 | T71 | 103 | T77 | 1 | T389 | 85 | ||||
rising | 8447 | 1 | T71 | 103 | T77 | 1 | T389 | 86 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 171813 | 1 | T70 | 32 | T71 | 175 | T72 | 1 | ||||
auto[1] | 17427 | 1 | T71 | 323 | T77 | 1 | T389 | 293 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4485 | 1 | T429 | 30 | T505 | 1 | T386 | 14 | ||||
rising | 4516 | 1 | T429 | 30 | T505 | 1 | T386 | 14 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175617 | 1 | T70 | 30 | T72 | 4 | T78 | 23 | ||||
auto[1] | 6717 | 1 | T429 | 32 | T505 | 1 | T386 | 15 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 200026 | 1 | T78 | 38 | T241 | 15 | T427 | 260 | ||||
rising | 200038 | 1 | T78 | 38 | T241 | 15 | T427 | 260 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1793763 | 1 | T78 | 443 | T241 | 178 | T427 | 2509 | ||||
auto[1] | 225023 | 1 | T78 | 43 | T241 | 17 | T427 | 284 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 495500 | 1 | T78 | 119 | T241 | 42 | T427 | 699 | ||||
rising | 495528 | 1 | T78 | 120 | T241 | 41 | T427 | 699 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 896001 | 1 | T78 | 216 | T241 | 89 | T427 | 1285 | ||||
auto[1] | 1122785 | 1 | T78 | 270 | T241 | 106 | T427 | 1508 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 495500 | 1 | T78 | 119 | T241 | 42 | T427 | 699 | ||||
rising | 495528 | 1 | T78 | 120 | T241 | 41 | T427 | 699 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 896001 | 1 | T78 | 216 | T241 | 89 | T427 | 1285 | ||||
auto[1] | 1122785 | 1 | T78 | 270 | T241 | 106 | T427 | 1508 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |