Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	161158	1			T70	33		T72	8		T78	19
values[2]	3163	1			T389	1		T429	1		T505	10
values[3]	1343	1			T389	1		T505	7		T663	1
values[4]	1055	1			T389	1		T505	3		T428	7
values[5]	837	1			T389	1		T505	5		T428	20
values[6]	688	1			T389	1		T505	4		T428	22
values[7]	649	1			T389	1		T428	16		T378	12
values[8]	595	1			T389	1		T428	7		T378	15
values[9]	519	1			T389	1		T428	8		T378	29
values[10]	597	1			T389	1		T428	16		T378	29
values[11]	530	1			T389	1		T428	11		T378	22
values[12]	455	1			T389	1		T428	8		T378	9
values[13]	437	1			T389	1		T428	3		T378	9
values[14]	343	1			T389	1		T428	3		T378	6
values[15]	286	1			T389	1		T428	2		T378	1
values[16]	263	1			T389	1		T428	7		T378	4
values[17]	242	1			T389	1		T428	13		T378	3
values[18]	273	1			T389	1		T428	10		T378	7
values[19]	281	1			T389	1		T428	18		T443	19
values[20]	284	1			T389	1		T428	11		T443	11
values[21]	295	1			T389	1		T428	6		T443	3
values[22]	250	1			T389	1		T428	21		T443	2
values[23]	241	1			T389	1		T428	20		T443	1
values[24]	209	1			T389	1		T428	6		T750	1
values[25]	246	1			T389	1		T428	7		T750	1
values[26]	212	1			T389	1		T428	8		T750	1
values[27]	218	1			T389	1		T428	10		T750	1
values[28]	178	1			T389	1		T428	8		T750	1
values[29]	180	1			T389	1		T428	5		T750	1
values[30]	131	1			T389	1		T428	7		T750	1
values[31]	121	1			T389	1		T428	3		T750	1
values[32]	156	1			T389	1		T428	6		T750	1
values[33]	178	1			T389	1		T428	1		T750	1
values[34]	125	1			T389	1		T750	1		T780	1
values[35]	114	1			T389	1		T750	1		T780	1
values[36]	124	1			T389	1		T750	1		T780	1
values[37]	156	1			T389	1		T750	1		T780	1
values[38]	137	1			T389	1		T750	1		T780	1
values[39]	148	1			T389	1		T750	1		T780	1
values[40]	150	1			T389	1		T750	1		T780	1
values[41]	107	1			T389	1		T750	1		T780	1
values[42]	105	1			T389	1		T750	1		T780	1
values[43]	90	1			T389	1		T750	1		T780	1
values[44]	81	1			T389	1		T750	1		T780	1
values[45]	60	1			T389	1		T750	1		T780	1
values[46]	54	1			T389	1		T750	1		T780	1
values[47]	54	1			T389	1		T750	1		T780	1
values[48]	63	1			T389	1		T750	1		T780	1
values[49]	60	1			T389	1		T750	1		T780	1
values[50]	74	1			T389	1		T750	1		T780	1
values[51]	82	1			T389	1		T750	1		T780	2
values[52]	76	1			T389	1		T750	2		T780	1
values[53]	70	1			T389	1		T750	1		T780	1
values[54]	73	1			T389	1		T750	1		T780	1
values[55]	51	1			T389	1		T750	1		T780	1
values[56]	45	1			T389	1		T750	1		T780	1
values[57]	54	1			T389	1		T750	1		T780	1
values[58]	55	1			T389	1		T750	1		T780	1
values[59]	47	1			T389	1		T750	1		T780	1
values[60]	39	1			T389	1		T750	1		T780	1
values[61]	50	1			T389	1		T750	1		T780	1
values[62]	45	1			T389	1		T750	1		T780	1
values[63]	50	1			T389	1		T750	1		T780	1
values[64]	45	1			T389	1		T750	1		T780	1
values[65]	49	1			T389	1		T750	1		T780	1
values[66]	45	1			T389	1		T750	1		T780	1
values[67]	48	1			T389	1		T750	1		T780	1
values[68]	38	1			T389	1		T750	1		T780	1
values[69]	44	1			T389	1		T750	1		T780	1
values[70]	40	1			T389	1		T750	1		T780	1
values[71]	58	1			T389	1		T750	1		T780	1
values[72]	55	1			T389	1		T750	1		T780	1
values[73]	52	1			T389	1		T750	1		T780	1
values[74]	45	1			T389	1		T750	1		T780	1
values[75]	54	1			T389	1		T750	1		T780	1
values[76]	57	1			T389	1		T750	1		T780	1
values[77]	60	1			T389	2		T750	1		T780	1
values[78]	54	1			T389	1		T750	1		T780	1
values[79]	56	1			T389	1		T750	1		T780	1
values[80]	52	1			T389	1		T750	1		T780	1
values[81]	71	1			T389	1		T750	1		T780	1
values[82]	58	1			T389	1		T750	1		T780	1
values[83]	53	1			T389	1		T750	1		T780	1
values[84]	54	1			T389	1		T750	1		T780	1
values[85]	54	1			T389	1		T750	1		T780	1
values[86]	62	1			T389	1		T750	1		T780	1
values[87]	65	1			T389	1		T750	1		T780	1
values[88]	48	1			T389	1		T750	1		T780	1
values[89]	52	1			T389	1		T750	1		T780	1
values[90]	61	1			T389	1		T750	1		T780	1
values[91]	65	1			T389	1		T750	1		T780	1
values[92]	60	1			T389	1		T750	1		T780	1
values[93]	57	1			T389	1		T750	1		T780	1
values[94]	81	1			T389	1		T750	1		T780	1
values[95]	68	1			T389	1		T750	1		T780	1
values[96]	70	1			T389	2		T750	1		T780	1
values[97]	87	1			T389	4		T750	1		T780	2
values[98]	84	1			T389	12		T750	1		T780	1
values[99]	89	1			T389	2		T750	1		T780	1
values[100]	68	1			T389	2		T750	1		T780	1
values[101]	70	1			T389	4		T750	1		T780	1
values[102]	77	1			T389	3		T750	1		T780	1
values[103]	74	1			T389	1		T750	1		T780	1
values[104]	68	1			T389	2		T750	1		T780	2
values[105]	73	1			T389	6		T750	1		T780	1
values[106]	69	1			T389	1		T750	1		T780	1
values[107]	85	1			T389	1		T750	1		T780	1
values[108]	75	1			T389	1		T750	1		T780	3
values[109]	81	1			T389	3		T750	1		T780	1
values[110]	75	1			T389	1		T750	1		T780	1
values[111]	97	1			T389	3		T750	1		T780	3
values[112]	102	1			T389	2		T750	1		T780	1
values[113]	85	1			T389	2		T750	1		T780	2
values[114]	74	1			T389	2		T750	1		T780	1
values[115]	78	1			T389	3		T750	1		T780	2
values[116]	90	1			T389	1		T750	1		T780	2
values[117]	109	1			T389	2		T750	2		T780	2
values[118]	104	1			T389	3		T750	3		T780	6
values[119]	84	1			T389	3		T750	2		T780	3
values[120]	88	1			T389	2		T750	4		T780	1
values[121]	94	1			T389	3		T750	3		T780	1
values[122]	73	1			T389	2		T750	1		T780	1
values[123]	139	1			T389	3		T750	2		T780	1
values[124]	185	1			T389	3		T750	2		T780	1
values[125]	373	1			T389	4		T750	4		T780	1
values[126]	716	1			T389	10		T750	12		T780	18
values[127]	2319	1			T389	116		T750	101		T780	104
values[128]	3962	1			T389	260		T750	192		T780	158