Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sysrst_ctrl_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142483	1			T70	30		T72	5		T78	19
values[2]	9873	1			T77	1		T498	1		T429	1
values[3]	3786	1			T498	1		T662	1		T408	13
values[4]	2124	1			T498	1		T662	1		T408	6
values[5]	1330	1			T498	1		T662	1		T751	5
values[6]	836	1			T498	1		T662	1		T751	4
values[7]	695	1			T498	1		T662	1		T751	7
values[8]	551	1			T498	1		T662	1		T751	10
values[9]	494	1			T498	1		T662	1		T751	12
values[10]	430	1			T498	1		T662	1		T751	6
values[11]	394	1			T498	1		T662	1		T751	6
values[12]	406	1			T498	1		T662	1		T751	12
values[13]	325	1			T498	1		T662	1		T751	10
values[14]	407	1			T498	1		T662	1		T751	8
values[15]	368	1			T498	1		T662	1		T751	5
values[16]	341	1			T498	1		T662	1		T751	10
values[17]	325	1			T498	1		T662	1		T751	4
values[18]	335	1			T498	1		T662	1		T751	6
values[19]	386	1			T498	1		T662	1		T751	7
values[20]	336	1			T498	1		T662	1		T751	14
values[21]	354	1			T498	1		T662	1		T751	11
values[22]	302	1			T498	1		T662	1		T751	2
values[23]	336	1			T498	1		T662	1		T751	7
values[24]	291	1			T498	1		T662	1		T751	7
values[25]	353	1			T498	1		T662	1		T751	8
values[26]	391	1			T498	1		T662	1		T751	9
values[27]	342	1			T498	1		T662	2		T751	3
values[28]	311	1			T498	1		T662	1		T751	12
values[29]	312	1			T498	1		T662	1		T751	5
values[30]	312	1			T498	1		T662	1		T751	4
values[31]	295	1			T498	1		T662	1		T751	6
values[32]	312	1			T498	1		T662	1		T751	9
values[33]	386	1			T498	1		T662	1		T751	3
values[34]	309	1			T498	1		T662	1		T751	13
values[35]	266	1			T498	1		T662	1		T751	5
values[36]	326	1			T498	1		T662	1		T751	5
values[37]	333	1			T498	1		T662	1		T751	9
values[38]	367	1			T498	1		T662	1		T751	8
values[39]	366	1			T498	1		T662	1		T751	4
values[40]	331	1			T498	1		T662	1		T751	3
values[41]	295	1			T498	1		T662	1		T751	16
values[42]	296	1			T498	1		T662	1		T751	3
values[43]	281	1			T498	1		T662	1		T751	4
values[44]	329	1			T498	1		T662	1		T751	3
values[45]	322	1			T498	1		T662	1		T751	6
values[46]	303	1			T498	1		T662	1		T751	5
values[47]	264	1			T498	1		T662	1		T751	14
values[48]	284	1			T498	1		T662	1		T751	4
values[49]	268	1			T498	1		T662	1		T751	10
values[50]	305	1			T498	1		T662	1		T751	15
values[51]	265	1			T498	1		T662	1		T751	14
values[52]	262	1			T498	1		T662	1		T751	9
values[53]	271	1			T498	1		T662	1		T751	12
values[54]	301	1			T498	1		T662	1		T751	3
values[55]	313	1			T498	1		T662	1		T751	18
values[56]	277	1			T498	1		T662	1		T751	18
values[57]	245	1			T498	1		T662	1		T751	9
values[58]	292	1			T498	1		T662	1		T751	5
values[59]	204	1			T498	1		T662	1		T751	6
values[60]	255	1			T498	1		T662	1		T751	6
values[61]	187	1			T498	1		T662	1		T751	5
values[62]	199	1			T498	1		T662	1		T751	5
values[63]	219	1			T498	1		T662	1		T751	11
values[64]	227	1			T498	1		T662	1		T751	6
values[65]	140	1			T498	1		T662	1		T751	2
values[66]	151	1			T498	1		T662	1		T751	4
values[67]	197	1			T498	1		T662	1		T751	5
values[68]	126	1			T498	1		T662	1		T757	2
values[69]	133	1			T498	1		T662	1		T757	2
values[70]	83	1			T498	1		T662	1		T757	2
values[71]	105	1			T498	1		T662	1		T757	2
values[72]	105	1			T498	1		T662	1		T757	2
values[73]	86	1			T498	1		T662	1		T757	3
values[74]	62	1			T498	1		T662	1		T757	2
values[75]	70	1			T498	1		T662	1		T757	2
values[76]	106	1			T498	2		T662	1		T757	2
values[77]	94	1			T498	1		T662	1		T757	2
values[78]	76	1			T498	1		T662	1		T757	2
values[79]	76	1			T498	1		T662	1		T757	2
values[80]	75	1			T498	1		T662	1		T757	2
values[81]	76	1			T498	1		T662	1		T757	2
values[82]	84	1			T498	1		T662	1		T757	2
values[83]	64	1			T498	1		T662	1		T757	2
values[84]	88	1			T498	1		T662	1		T757	2
values[85]	70	1			T498	1		T662	1		T757	2
values[86]	55	1			T498	1		T662	1		T757	2
values[87]	60	1			T498	1		T662	1		T757	3
values[88]	50	1			T498	1		T662	1		T757	2
values[89]	46	1			T498	1		T662	1		T757	2
values[90]	50	1			T498	1		T662	1		T757	2
values[91]	59	1			T498	1		T662	1		T757	2
values[92]	62	1			T498	1		T662	1		T757	2
values[93]	67	1			T498	1		T662	1		T757	2
values[94]	61	1			T498	1		T662	1		T757	2
values[95]	87	1			T498	1		T662	1		T757	2
values[96]	65	1			T498	1		T662	1		T757	2
values[97]	89	1			T498	1		T662	1		T757	2
values[98]	84	1			T498	1		T662	1		T757	2
values[99]	92	1			T498	8		T662	1		T757	2
values[100]	61	1			T498	1		T662	1		T757	2
values[101]	81	1			T498	1		T662	1		T757	2
values[102]	59	1			T498	3		T662	1		T757	3
values[103]	57	1			T498	1		T662	1		T757	2
values[104]	67	1			T498	4		T662	1		T757	2
values[105]	72	1			T498	1		T662	1		T757	6
values[106]	79	1			T498	4		T662	1		T757	5
values[107]	65	1			T498	1		T662	1		T757	7
values[108]	57	1			T498	3		T662	1		T757	3
values[109]	71	1			T498	2		T662	1		T757	5
values[110]	68	1			T498	1		T662	1		T757	6
values[111]	71	1			T498	2		T662	1		T757	5
values[112]	93	1			T498	1		T662	1		T757	8
values[113]	83	1			T498	1		T662	1		T757	4
values[114]	86	1			T498	8		T662	1		T757	7
values[115]	66	1			T498	1		T662	1		T757	3
values[116]	73	1			T498	1		T662	1		T757	4
values[117]	63	1			T498	2		T662	1		T757	4
values[118]	69	1			T498	11		T662	2		T757	5
values[119]	42	1			T498	1		T662	1		T757	2
values[120]	61	1			T498	2		T662	1		T757	4
values[121]	62	1			T498	1		T662	2		T757	3
values[122]	51	1			T498	1		T662	2		T757	3
values[123]	56	1			T498	2		T662	1		T757	2
values[124]	60	1			T498	2		T662	1		T757	5
values[125]	81	1			T498	1		T662	2		T757	4
values[126]	113	1			T498	5		T662	7		T757	4
values[127]	804	1			T498	34		T662	43		T757	63
values[128]	7779	1			T498	280		T662	390		T757	614