CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 387675 | 1 | T74 | 1 | T76 | 2 | T80 | 129 | ||||
rising | 387783 | 1 | T74 | 2 | T76 | 2 | T80 | 130 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1071289 | 1 | T74 | 4 | T76 | 4 | T80 | 336 | ||||
auto[1] | 9613110 | 1 | T74 | 886 | T75 | 348 | T76 | 5320 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 334367 | 1 | T74 | 1 | T76 | 1 | T80 | 239 | ||||
rising | 334444 | 1 | T74 | 1 | T76 | 1 | T80 | 239 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1182387 | 1 | T74 | 2 | T76 | 2 | T80 | 484 | ||||
auto[1] | 10346498 | 1 | T74 | 882 | T75 | 356 | T76 | 5154 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 683966 | 1 | T74 | 1 | T76 | 1 | T80 | 226 | ||||
rising | 684049 | 1 | T74 | 1 | T76 | 1 | T80 | 226 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1077429 | 1 | T74 | 2 | T76 | 2 | T80 | 325 | ||||
auto[1] | 9714703 | 1 | T74 | 1040 | T75 | 254 | T76 | 5758 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6401 | 1 | T404 | 1 | T476 | 3 | T366 | 6 | ||||
rising | 6445 | 1 | T404 | 1 | T476 | 3 | T390 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 163206 | 1 | T74 | 22 | T75 | 7 | T80 | 11 | ||||
auto[1] | 12514 | 1 | T404 | 2 | T476 | 3 | T390 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5172 | 1 | T405 | 1 | T481 | 1 | T475 | 1 | ||||
rising | 5206 | 1 | T405 | 1 | T481 | 2 | T475 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189832 | 1 | T74 | 11 | T75 | 2 | T80 | 17 | ||||
auto[1] | 7733 | 1 | T405 | 1 | T481 | 2 | T475 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3905 | 1 | T76 | 46 | T479 | 1 | T404 | 1 | ||||
rising | 3930 | 1 | T76 | 46 | T479 | 1 | T404 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193717 | 1 | T74 | 12 | T75 | 12 | T76 | 432 | ||||
auto[1] | 4225 | 1 | T76 | 53 | T479 | 1 | T404 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6350 | 1 | T122 | 1 | T456 | 1 | T476 | 2 | ||||
rising | 6393 | 1 | T122 | 1 | T456 | 1 | T476 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168130 | 1 | T74 | 18 | T75 | 5 | T80 | 17 | ||||
auto[1] | 15665 | 1 | T122 | 1 | T456 | 1 | T476 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4320 | 1 | T476 | 3 | T481 | 1 | T372 | 65 | ||||
rising | 4349 | 1 | T405 | 1 | T476 | 3 | T481 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183409 | 1 | T74 | 30 | T75 | 6 | T80 | 6 | ||||
auto[1] | 4903 | 1 | T405 | 1 | T476 | 3 | T481 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8381 | 1 | T80 | 2 | T456 | 1 | T367 | 1 | ||||
rising | 8440 | 1 | T75 | 1 | T80 | 2 | T456 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175181 | 1 | T74 | 18 | T75 | 7 | T80 | 104 | ||||
auto[1] | 17286 | 1 | T75 | 1 | T80 | 2 | T456 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5838 | 1 | T476 | 1 | T481 | 1 | T488 | 48 | ||||
rising | 5878 | 1 | T476 | 1 | T481 | 1 | T488 | 48 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189616 | 1 | T74 | 19 | T75 | 6 | T80 | 16 | ||||
auto[1] | 11802 | 1 | T476 | 1 | T481 | 1 | T488 | 59 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4625 | 1 | T456 | 1 | T405 | 1 | T476 | 3 | ||||
rising | 4654 | 1 | T456 | 1 | T405 | 1 | T476 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172667 | 1 | T74 | 19 | T75 | 8 | T80 | 23 | ||||
auto[1] | 9222 | 1 | T456 | 1 | T405 | 1 | T476 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5657 | 1 | T488 | 27 | T695 | 1 | T696 | 37 | ||||
rising | 5692 | 1 | T488 | 27 | T695 | 1 | T696 | 37 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 192902 | 1 | T74 | 20 | T75 | 3 | T80 | 20 | ||||
auto[1] | 11110 | 1 | T488 | 33 | T695 | 1 | T696 | 42 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6588 | 1 | T476 | 1 | T696 | 24 | T519 | 2 | ||||
rising | 6618 | 1 | T476 | 1 | T696 | 24 | T519 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 198194 | 1 | T74 | 20 | T75 | 6 | T80 | 9 | ||||
auto[1] | 10678 | 1 | T476 | 1 | T696 | 25 | T519 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4499 | 1 | T76 | 101 | T476 | 1 | T372 | 86 | ||||
rising | 4526 | 1 | T76 | 101 | T476 | 1 | T372 | 87 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182004 | 1 | T74 | 16 | T75 | 4 | T76 | 368 | ||||
auto[1] | 5673 | 1 | T76 | 133 | T476 | 1 | T372 | 126 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 15427 | 1 | T75 | 4 | T76 | 25 | T224 | 49 | ||||
rising | 15454 | 1 | T75 | 4 | T76 | 25 | T224 | 49 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1486019 | 1 | T74 | 115 | T75 | 56 | T76 | 602 | ||||
auto[1] | 16141 | 1 | T75 | 4 | T76 | 25 | T224 | 54 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6559 | 1 | T122 | 2 | T488 | 1 | T696 | 50 | ||||
rising | 6598 | 1 | T122 | 2 | T488 | 1 | T696 | 50 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182740 | 1 | T74 | 15 | T75 | 5 | T80 | 15 | ||||
auto[1] | 14470 | 1 | T122 | 2 | T488 | 1 | T696 | 56 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6729 | 1 | T76 | 77 | T123 | 26 | T479 | 1 | ||||
rising | 6786 | 1 | T76 | 78 | T123 | 26 | T479 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 160151 | 1 | T74 | 16 | T75 | 4 | T76 | 102 | ||||
auto[1] | 17053 | 1 | T76 | 482 | T123 | 29 | T479 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2360 | 1 | T224 | 39 | T456 | 2 | T476 | 1 | ||||
rising | 2386 | 1 | T224 | 39 | T456 | 2 | T476 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189896 | 1 | T74 | 18 | T75 | 3 | T80 | 16 | ||||
auto[1] | 2492 | 1 | T224 | 43 | T456 | 2 | T476 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8787 | 1 | T122 | 1 | T456 | 3 | T404 | 1 | ||||
rising | 8843 | 1 | T122 | 1 | T456 | 3 | T404 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172560 | 1 | T74 | 18 | T75 | 3 | T80 | 16 | ||||
auto[1] | 18529 | 1 | T122 | 1 | T456 | 3 | T404 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6913 | 1 | T76 | 98 | T404 | 1 | T476 | 4 | ||||
rising | 6954 | 1 | T76 | 98 | T404 | 1 | T476 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 170173 | 1 | T74 | 15 | T75 | 8 | T76 | 173 | ||||
auto[1] | 14102 | 1 | T76 | 351 | T404 | 1 | T476 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7795 | 1 | T76 | 203 | T456 | 2 | T478 | 1 | ||||
rising | 7840 | 1 | T76 | 204 | T456 | 2 | T478 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177392 | 1 | T74 | 20 | T75 | 4 | T76 | 340 | ||||
auto[1] | 15015 | 1 | T76 | 691 | T456 | 2 | T478 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5446 | 1 | T372 | 234 | T488 | 19 | T696 | 13 | ||||
rising | 5474 | 1 | T372 | 234 | T488 | 19 | T696 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185967 | 1 | T74 | 12 | T75 | 6 | T80 | 11 | ||||
auto[1] | 8550 | 1 | T372 | 457 | T488 | 23 | T696 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3083 | 1 | T456 | 1 | T404 | 1 | T481 | 1 | ||||
rising | 3104 | 1 | T75 | 1 | T456 | 1 | T404 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 202957 | 1 | T74 | 12 | T75 | 2 | T80 | 17 | ||||
auto[1] | 3313 | 1 | T75 | 1 | T456 | 1 | T404 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4958 | 1 | T456 | 1 | T367 | 1 | T476 | 2 | ||||
rising | 4997 | 1 | T456 | 1 | T367 | 1 | T476 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 167759 | 1 | T74 | 17 | T75 | 5 | T80 | 14 | ||||
auto[1] | 7217 | 1 | T456 | 1 | T367 | 1 | T476 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 44148 | 1 | T406 | 942 | T493 | 570 | T489 | 1707 | ||||
rising | 44157 | 1 | T406 | 943 | T493 | 570 | T489 | 1707 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 94958 | 1 | T406 | 2338 | T493 | 1219 | T489 | 3842 | ||||
auto[1] | 86259 | 1 | T406 | 1828 | T493 | 1117 | T489 | 3326 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 25133 | 1 | T406 | 627 | T493 | 329 | T489 | 1002 | ||||
rising | 25125 | 1 | T406 | 626 | T493 | 329 | T489 | 1001 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 150148 | 1 | T406 | 3310 | T493 | 1934 | T489 | 5935 | ||||
auto[1] | 31069 | 1 | T406 | 856 | T493 | 402 | T489 | 1233 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 25133 | 1 | T406 | 627 | T493 | 329 | T489 | 1002 | ||||
rising | 25125 | 1 | T406 | 626 | T493 | 329 | T489 | 1001 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 150148 | 1 | T406 | 3310 | T493 | 1934 | T489 | 5935 | ||||
auto[1] | 31069 | 1 | T406 | 856 | T493 | 402 | T489 | 1233 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4255 | 1 | T406 | 253 | T493 | 75 | T489 | 202 | ||||
rising | 4246 | 1 | T406 | 252 | T493 | 74 | T489 | 201 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175105 | 1 | T406 | 3736 | T493 | 2213 | T489 | 6859 | ||||
auto[1] | 6112 | 1 | T406 | 430 | T493 | 123 | T489 | 309 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 82449 | 1 | T406 | 1 | T493 | 1 | T489 | 3 | ||||
rising | 82469 | 1 | T406 | 1 | T493 | 1 | T489 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 23375719 | 1 | T1 | 33926 | T2 | 74226 | T3 | 8531 | ||||
auto[1] | 530367 | 1 | T406 | 1 | T493 | 1 | T489 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 44665 | 1 | T406 | 1001 | T493 | 567 | T489 | 1764 | ||||
rising | 44665 | 1 | T406 | 1001 | T493 | 567 | T489 | 1763 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 95639 | 1 | T406 | 2352 | T493 | 1207 | T489 | 3876 | ||||
auto[1] | 85578 | 1 | T406 | 1814 | T493 | 1129 | T489 | 3292 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 38043 | 1 | T406 | 867 | T493 | 482 | T489 | 1492 | ||||
rising | 38052 | 1 | T406 | 867 | T493 | 483 | T489 | 1493 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 126825 | 1 | T406 | 2962 | T493 | 1672 | T489 | 5007 | ||||
auto[1] | 54392 | 1 | T406 | 1204 | T493 | 664 | T489 | 2161 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2322 | 1 | T476 | 2 | T475 | 1 | T696 | 3 | ||||
rising | 2340 | 1 | T476 | 2 | T475 | 1 | T696 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 191222 | 1 | T74 | 22 | T75 | 6 | T80 | 10 | ||||
auto[1] | 2472 | 1 | T476 | 2 | T475 | 1 | T696 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2917 | 1 | T475 | 3 | T366 | 21 | T585 | 1 | ||||
rising | 2940 | 1 | T475 | 3 | T366 | 21 | T585 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183930 | 1 | T74 | 18 | T75 | 6 | T80 | 12 | ||||
auto[1] | 3114 | 1 | T475 | 3 | T366 | 21 | T585 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6633 | 1 | T479 | 1 | T405 | 1 | T480 | 1 | ||||
rising | 6683 | 1 | T479 | 1 | T405 | 1 | T480 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 163138 | 1 | T74 | 23 | T75 | 9 | T80 | 18 | ||||
auto[1] | 26028 | 1 | T479 | 1 | T405 | 1 | T480 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6596 | 1 | T75 | 1 | T476 | 1 | T480 | 1 | ||||
rising | 6631 | 1 | T75 | 1 | T476 | 1 | T480 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 165782 | 1 | T74 | 21 | T75 | 7 | T80 | 6 | ||||
auto[1] | 19013 | 1 | T75 | 1 | T476 | 1 | T480 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3345 | 1 | T479 | 2 | T372 | 43 | T366 | 5 | ||||
rising | 3364 | 1 | T479 | 2 | T372 | 43 | T366 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189680 | 1 | T74 | 27 | T75 | 3 | T80 | 18 | ||||
auto[1] | 3587 | 1 | T479 | 2 | T372 | 49 | T366 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 9247 | 1 | T75 | 1 | T456 | 1 | T486 | 1 | ||||
rising | 9299 | 1 | T75 | 1 | T456 | 1 | T486 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182373 | 1 | T74 | 15 | T75 | 4 | T80 | 11 | ||||
auto[1] | 19063 | 1 | T75 | 1 | T456 | 1 | T486 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7316 | 1 | T76 | 108 | T478 | 1 | T372 | 87 | ||||
rising | 7360 | 1 | T76 | 108 | T478 | 1 | T372 | 87 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175985 | 1 | T74 | 23 | T75 | 2 | T76 | 187 | ||||
auto[1] | 14853 | 1 | T76 | 314 | T478 | 1 | T372 | 306 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6370 | 1 | T456 | 1 | T495 | 3 | T696 | 59 | ||||
rising | 6405 | 1 | T456 | 1 | T495 | 3 | T696 | 59 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 179898 | 1 | T74 | 24 | T75 | 5 | T80 | 10 | ||||
auto[1] | 14303 | 1 | T456 | 1 | T495 | 3 | T696 | 63 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 22165 | 1 | T76 | 19 | T224 | 12 | T123 | 1 | ||||
rising | 22190 | 1 | T76 | 19 | T224 | 12 | T123 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1465058 | 1 | T74 | 133 | T75 | 54 | T76 | 610 | ||||
auto[1] | 23221 | 1 | T76 | 20 | T224 | 12 | T123 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8034 | 1 | T224 | 88 | T488 | 65 | T585 | 178 | ||||
rising | 8078 | 1 | T224 | 89 | T488 | 65 | T585 | 178 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172543 | 1 | T74 | 19 | T75 | 7 | T80 | 60 | ||||
auto[1] | 15786 | 1 | T224 | 298 | T488 | 89 | T585 | 241 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6995 | 1 | T76 | 105 | T456 | 1 | T488 | 2 | ||||
rising | 7025 | 1 | T76 | 105 | T456 | 1 | T488 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 191641 | 1 | T74 | 12 | T75 | 8 | T76 | 269 | ||||
auto[1] | 10956 | 1 | T76 | 196 | T456 | 1 | T488 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 208267 | 1 | T80 | 62 | T404 | 230 | T405 | 25 | ||||
rising | 208271 | 1 | T80 | 62 | T404 | 231 | T405 | 25 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1870098 | 1 | T80 | 550 | T404 | 1959 | T405 | 166 | ||||
auto[1] | 234194 | 1 | T80 | 69 | T404 | 255 | T405 | 26 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 516104 | 1 | T80 | 129 | T404 | 553 | T405 | 49 | ||||
rising | 516122 | 1 | T80 | 130 | T404 | 552 | T405 | 49 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 933075 | 1 | T80 | 261 | T404 | 976 | T405 | 80 | ||||
auto[1] | 1171217 | 1 | T80 | 358 | T404 | 1238 | T405 | 112 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 516104 | 1 | T80 | 129 | T404 | 553 | T405 | 49 | ||||
rising | 516122 | 1 | T80 | 130 | T404 | 552 | T405 | 49 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 933075 | 1 | T80 | 261 | T404 | 976 | T405 | 80 | ||||
auto[1] | 1171217 | 1 | T80 | 358 | T404 | 1238 | T405 | 112 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |