CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 355931 | 1 | T70 | 8 | T72 | 1 | T222 | 1 | ||||
rising | 356028 | 1 | T70 | 8 | T72 | 1 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1005091 | 1 | T70 | 16 | T72 | 2 | T222 | 2 | ||||
auto[1] | 9098072 | 1 | T70 | 3652 | T71 | 3360 | T72 | 4394 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 315869 | 1 | T70 | 6 | T71 | 1 | T222 | 1 | ||||
rising | 315950 | 1 | T70 | 7 | T71 | 1 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1120433 | 1 | T70 | 14 | T71 | 2 | T222 | 2 | ||||
auto[1] | 9772541 | 1 | T70 | 3746 | T71 | 3720 | T72 | 4592 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 636161 | 1 | T70 | 8 | T71 | 3 | T72 | 4 | ||||
rising | 636221 | 1 | T70 | 8 | T71 | 3 | T72 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1021844 | 1 | T70 | 16 | T71 | 4 | T72 | 4 | ||||
auto[1] | 9183077 | 1 | T70 | 3590 | T71 | 3394 | T72 | 3644 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7496 | 1 | T72 | 2 | T221 | 1 | T222 | 2 | ||||
rising | 7540 | 1 | T72 | 3 | T221 | 1 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168228 | 1 | T70 | 71 | T71 | 60 | T72 | 83 | ||||
auto[1] | 16236 | 1 | T72 | 3 | T221 | 1 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4893 | 1 | T72 | 3 | T222 | 2 | T386 | 1 | ||||
rising | 4919 | 1 | T72 | 3 | T222 | 2 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 167818 | 1 | T70 | 84 | T71 | 66 | T72 | 59 | ||||
auto[1] | 7640 | 1 | T72 | 3 | T222 | 2 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3235 | 1 | T71 | 1 | T72 | 3 | T222 | 1 | ||||
rising | 3258 | 1 | T71 | 1 | T72 | 3 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172695 | 1 | T70 | 60 | T71 | 64 | T72 | 80 | ||||
auto[1] | 3502 | 1 | T71 | 1 | T72 | 3 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5889 | 1 | T72 | 5 | T222 | 3 | T386 | 3 | ||||
rising | 5931 | 1 | T72 | 5 | T222 | 3 | T386 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 152166 | 1 | T70 | 75 | T71 | 59 | T72 | 73 | ||||
auto[1] | 17711 | 1 | T72 | 5 | T222 | 3 | T386 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4278 | 1 | T71 | 3 | T72 | 4 | T222 | 4 | ||||
rising | 4300 | 1 | T71 | 3 | T72 | 4 | T222 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177256 | 1 | T70 | 72 | T71 | 75 | T72 | 84 | ||||
auto[1] | 4865 | 1 | T71 | 3 | T72 | 4 | T222 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8330 | 1 | T71 | 1 | T72 | 2 | T222 | 1 | ||||
rising | 8369 | 1 | T71 | 1 | T72 | 2 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 170358 | 1 | T70 | 84 | T71 | 70 | T72 | 74 | ||||
auto[1] | 16884 | 1 | T71 | 1 | T72 | 3 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5113 | 1 | T71 | 4 | T72 | 5 | T222 | 2 | ||||
rising | 5147 | 1 | T71 | 4 | T72 | 5 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 167631 | 1 | T70 | 78 | T71 | 64 | T72 | 73 | ||||
auto[1] | 9993 | 1 | T71 | 4 | T72 | 6 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5966 | 1 | T72 | 2 | T222 | 6 | T509 | 1 | ||||
rising | 5994 | 1 | T72 | 2 | T222 | 6 | T509 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 165082 | 1 | T70 | 74 | T71 | 73 | T72 | 77 | ||||
auto[1] | 12432 | 1 | T72 | 2 | T222 | 7 | T509 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5081 | 1 | T71 | 2 | T72 | 2 | T221 | 1 | ||||
rising | 5118 | 1 | T71 | 2 | T72 | 3 | T221 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 163575 | 1 | T70 | 60 | T71 | 74 | T72 | 72 | ||||
auto[1] | 11055 | 1 | T71 | 3 | T72 | 3 | T221 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6687 | 1 | T72 | 3 | T386 | 2 | T434 | 9 | ||||
rising | 6718 | 1 | T72 | 3 | T386 | 2 | T434 | 9 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 179616 | 1 | T70 | 60 | T71 | 60 | T72 | 76 | ||||
auto[1] | 10730 | 1 | T72 | 3 | T386 | 2 | T434 | 9 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4464 | 1 | T72 | 3 | T222 | 1 | T509 | 2 | ||||
rising | 4490 | 1 | T72 | 3 | T222 | 1 | T509 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182500 | 1 | T70 | 73 | T71 | 63 | T72 | 80 | ||||
auto[1] | 5664 | 1 | T72 | 3 | T222 | 1 | T509 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 15682 | 1 | T71 | 10 | T72 | 31 | T221 | 2 | ||||
rising | 15708 | 1 | T71 | 10 | T72 | 31 | T221 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1399089 | 1 | T70 | 523 | T71 | 543 | T72 | 611 | ||||
auto[1] | 16346 | 1 | T71 | 11 | T72 | 32 | T221 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5892 | 1 | T71 | 1 | T72 | 8 | T222 | 1 | ||||
rising | 5935 | 1 | T71 | 1 | T72 | 8 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 165723 | 1 | T70 | 83 | T71 | 59 | T72 | 84 | ||||
auto[1] | 13596 | 1 | T71 | 1 | T72 | 8 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5862 | 1 | T71 | 2 | T72 | 4 | T222 | 1 | ||||
rising | 5904 | 1 | T71 | 2 | T72 | 4 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 161826 | 1 | T70 | 71 | T71 | 61 | T72 | 82 | ||||
auto[1] | 14382 | 1 | T71 | 2 | T72 | 4 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2542 | 1 | T71 | 1 | T72 | 1 | T222 | 2 | ||||
rising | 2577 | 1 | T71 | 1 | T72 | 1 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182922 | 1 | T70 | 79 | T71 | 71 | T72 | 71 | ||||
auto[1] | 2698 | 1 | T71 | 1 | T72 | 1 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7391 | 1 | T72 | 2 | T222 | 1 | T434 | 11 | ||||
rising | 7429 | 1 | T72 | 2 | T221 | 1 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 171680 | 1 | T70 | 73 | T71 | 70 | T72 | 68 | ||||
auto[1] | 15439 | 1 | T72 | 2 | T221 | 1 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6503 | 1 | T71 | 1 | T72 | 2 | T222 | 3 | ||||
rising | 6538 | 1 | T71 | 1 | T72 | 2 | T222 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 159538 | 1 | T70 | 64 | T71 | 67 | T72 | 85 | ||||
auto[1] | 13883 | 1 | T71 | 1 | T72 | 2 | T222 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7440 | 1 | T71 | 1 | T72 | 2 | T434 | 1 | ||||
rising | 7489 | 1 | T71 | 1 | T72 | 2 | T434 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 170648 | 1 | T70 | 75 | T71 | 61 | T72 | 66 | ||||
auto[1] | 15378 | 1 | T71 | 1 | T72 | 2 | T434 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6676 | 1 | T386 | 6 | T434 | 1 | T451 | 2 | ||||
rising | 6711 | 1 | T386 | 6 | T434 | 1 | T451 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 174377 | 1 | T70 | 76 | T71 | 53 | T72 | 80 | ||||
auto[1] | 10724 | 1 | T386 | 6 | T434 | 1 | T451 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2708 | 1 | T71 | 2 | T72 | 4 | T222 | 2 | ||||
rising | 2738 | 1 | T71 | 2 | T72 | 4 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178410 | 1 | T70 | 71 | T71 | 76 | T72 | 74 | ||||
auto[1] | 2923 | 1 | T71 | 2 | T72 | 4 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7005 | 1 | T71 | 1 | T72 | 3 | T222 | 3 | ||||
rising | 7040 | 1 | T71 | 1 | T72 | 3 | T222 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 167191 | 1 | T70 | 62 | T71 | 65 | T72 | 75 | ||||
auto[1] | 10974 | 1 | T71 | 1 | T72 | 3 | T222 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 42082 | 1 | T526 | 1425 | T523 | 2231 | T521 | 2484 | ||||
rising | 42092 | 1 | T526 | 1426 | T523 | 2232 | T521 | 2485 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 90219 | 1 | T526 | 2908 | T523 | 4407 | T521 | 5328 | ||||
auto[1] | 81913 | 1 | T526 | 2772 | T523 | 4317 | T521 | 4792 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 23915 | 1 | T526 | 784 | T523 | 1146 | T521 | 1356 | ||||
rising | 23911 | 1 | T526 | 784 | T523 | 1146 | T521 | 1355 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 142582 | 1 | T526 | 4750 | T523 | 7370 | T521 | 8469 | ||||
auto[1] | 29550 | 1 | T526 | 930 | T523 | 1354 | T521 | 1651 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 23915 | 1 | T526 | 784 | T523 | 1146 | T521 | 1356 | ||||
rising | 23911 | 1 | T526 | 784 | T523 | 1146 | T521 | 1355 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 142582 | 1 | T526 | 4750 | T523 | 7370 | T521 | 8469 | ||||
auto[1] | 29550 | 1 | T526 | 930 | T523 | 1354 | T521 | 1651 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3996 | 1 | T526 | 41 | T523 | 68 | T521 | 191 | ||||
rising | 3989 | 1 | T526 | 41 | T523 | 67 | T521 | 191 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 166580 | 1 | T526 | 5625 | T523 | 8634 | T521 | 9897 | ||||
auto[1] | 5552 | 1 | T526 | 55 | T523 | 90 | T521 | 223 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 110642 | 1 | T142 | 2 | T139 | 3292 | T334 | 5 | ||||
rising | 110659 | 1 | T142 | 2 | T139 | 3292 | T334 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 23114253 | 1 | T1 | 11805 | T2 | 9439 | T3 | 17747 | ||||
auto[1] | 642206 | 1 | T142 | 2 | T139 | 19436 | T334 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 42427 | 1 | T526 | 1444 | T523 | 2157 | T521 | 2536 | ||||
rising | 42428 | 1 | T526 | 1443 | T523 | 2157 | T521 | 2536 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 90661 | 1 | T526 | 2908 | T523 | 4460 | T521 | 5299 | ||||
auto[1] | 81471 | 1 | T526 | 2772 | T523 | 4264 | T521 | 4821 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 36217 | 1 | T526 | 1247 | T523 | 1854 | T521 | 2104 | ||||
rising | 36219 | 1 | T526 | 1248 | T523 | 1855 | T521 | 2104 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 120328 | 1 | T526 | 3905 | T523 | 6087 | T521 | 7126 | ||||
auto[1] | 51804 | 1 | T526 | 1775 | T523 | 2637 | T521 | 2994 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2138 | 1 | T71 | 2 | T72 | 2 | T222 | 2 | ||||
rising | 2158 | 1 | T71 | 2 | T72 | 2 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 180250 | 1 | T70 | 67 | T71 | 64 | T72 | 64 | ||||
auto[1] | 2266 | 1 | T71 | 2 | T72 | 2 | T222 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3163 | 1 | T71 | 1 | T72 | 2 | T222 | 4 | ||||
rising | 3192 | 1 | T71 | 1 | T72 | 2 | T222 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183570 | 1 | T70 | 70 | T71 | 64 | T72 | 77 | ||||
auto[1] | 3376 | 1 | T71 | 1 | T72 | 2 | T222 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7029 | 1 | T72 | 3 | T509 | 1 | T386 | 1 | ||||
rising | 7108 | 1 | T72 | 3 | T509 | 1 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 160628 | 1 | T70 | 68 | T71 | 71 | T72 | 69 | ||||
auto[1] | 29668 | 1 | T72 | 3 | T509 | 1 | T386 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5838 | 1 | T71 | 2 | T222 | 1 | T511 | 1 | ||||
rising | 5879 | 1 | T71 | 2 | T222 | 1 | T511 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 164394 | 1 | T70 | 70 | T71 | 59 | T72 | 74 | ||||
auto[1] | 14534 | 1 | T71 | 2 | T222 | 1 | T511 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3029 | 1 | T72 | 3 | T518 | 1 | T386 | 2 | ||||
rising | 3060 | 1 | T72 | 3 | T518 | 1 | T386 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 179440 | 1 | T70 | 89 | T71 | 80 | T72 | 83 | ||||
auto[1] | 3246 | 1 | T72 | 3 | T518 | 1 | T386 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7793 | 1 | T71 | 1 | T72 | 1 | T222 | 1 | ||||
rising | 7846 | 1 | T71 | 1 | T72 | 1 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 156305 | 1 | T70 | 73 | T71 | 56 | T72 | 83 | ||||
auto[1] | 17570 | 1 | T71 | 1 | T72 | 1 | T222 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7426 | 1 | T72 | 3 | T222 | 4 | T386 | 2 | ||||
rising | 7475 | 1 | T72 | 3 | T222 | 4 | T386 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169401 | 1 | T70 | 80 | T71 | 57 | T72 | 75 | ||||
auto[1] | 15593 | 1 | T72 | 3 | T222 | 4 | T386 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5304 | 1 | T71 | 2 | T72 | 2 | T222 | 3 | ||||
rising | 5344 | 1 | T71 | 2 | T72 | 2 | T222 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 162079 | 1 | T70 | 75 | T71 | 65 | T72 | 73 | ||||
auto[1] | 11740 | 1 | T71 | 2 | T72 | 2 | T222 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 22463 | 1 | T71 | 6 | T72 | 25 | T222 | 14 | ||||
rising | 22492 | 1 | T71 | 6 | T72 | 25 | T222 | 14 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1392502 | 1 | T70 | 554 | T71 | 531 | T72 | 681 | ||||
auto[1] | 23587 | 1 | T71 | 6 | T72 | 29 | T222 | 15 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6756 | 1 | T72 | 1 | T222 | 1 | T462 | 1 | ||||
rising | 6789 | 1 | T72 | 1 | T222 | 1 | T462 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 164127 | 1 | T70 | 65 | T71 | 57 | T72 | 78 | ||||
auto[1] | 12226 | 1 | T72 | 1 | T222 | 1 | T462 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5646 | 1 | T72 | 3 | T222 | 2 | T451 | 2 | ||||
rising | 5677 | 1 | T72 | 3 | T222 | 2 | T451 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172655 | 1 | T70 | 62 | T71 | 80 | T72 | 71 | ||||
auto[1] | 8870 | 1 | T72 | 3 | T222 | 2 | T451 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 186041 | 1 | T417 | 107 | T418 | 8 | T419 | 180 | ||||
rising | 186036 | 1 | T417 | 107 | T418 | 8 | T419 | 180 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1672847 | 1 | T417 | 963 | T418 | 54 | T419 | 1677 | ||||
auto[1] | 209156 | 1 | T417 | 130 | T418 | 9 | T419 | 201 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 461740 | 1 | T417 | 275 | T418 | 17 | T419 | 466 | ||||
rising | 461762 | 1 | T417 | 276 | T418 | 17 | T419 | 465 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 836265 | 1 | T417 | 500 | T418 | 25 | T419 | 844 | ||||
auto[1] | 1045738 | 1 | T417 | 593 | T418 | 38 | T419 | 1034 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 461740 | 1 | T417 | 275 | T418 | 17 | T419 | 466 | ||||
rising | 461762 | 1 | T417 | 276 | T418 | 17 | T419 | 465 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 836265 | 1 | T417 | 500 | T418 | 25 | T419 | 844 | ||||
auto[1] | 1045738 | 1 | T417 | 593 | T418 | 38 | T419 | 1034 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |