Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	144553	1			T70	83		T71	59		T72	81
values[2]	4448	1			T71	1		T72	10		T222	1
values[3]	2257	1			T72	1		T512	4		T442	1
values[4]	1671	1			T512	1		T812	1		T675	55
values[5]	1394	1			T512	5		T812	1		T675	70
values[6]	1076	1			T512	2		T812	1		T675	55
values[7]	911	1			T512	2		T812	2		T675	19
values[8]	726	1			T512	1		T812	1		T675	6
values[9]	594	1			T512	1		T812	1		T447	12
values[10]	526	1			T512	4		T812	1		T447	12
values[11]	492	1			T512	1		T812	1		T447	9
values[12]	487	1			T512	2		T812	1		T447	3
values[13]	345	1			T512	1		T812	1		T447	1
values[14]	258	1			T512	2		T812	1		T499	3
values[15]	256	1			T512	3		T812	1		T499	3
values[16]	243	1			T512	2		T812	1		T499	8
values[17]	205	1			T512	1		T812	1		T499	8
values[18]	163	1			T512	2		T812	1		T499	1
values[19]	164	1			T512	4		T812	1		T499	1
values[20]	187	1			T512	4		T812	1		T499	2
values[21]	207	1			T512	2		T812	1		T499	2
values[22]	171	1			T512	1		T812	1		T499	4
values[23]	171	1			T512	1		T812	1		T499	1
values[24]	163	1			T512	3		T812	1		T499	1
values[25]	141	1			T512	2		T812	1		T499	3
values[26]	148	1			T512	1		T812	1		T499	3
values[27]	132	1			T512	3		T812	1		T499	3
values[28]	138	1			T512	3		T812	1		T499	4
values[29]	124	1			T512	2		T812	1		T499	3
values[30]	128	1			T512	2		T812	1		T499	3
values[31]	118	1			T512	3		T812	1		T499	1
values[32]	95	1			T512	2		T812	1		T499	1
values[33]	85	1			T512	3		T812	1		T499	3
values[34]	68	1			T512	1		T812	1		T499	1
values[35]	97	1			T512	1		T812	1		T499	4
values[36]	92	1			T512	5		T812	1		T499	8
values[37]	74	1			T512	1		T812	1		T499	6
values[38]	78	1			T512	3		T812	1		T499	3
values[39]	89	1			T512	3		T812	1		T499	4
values[40]	109	1			T512	1		T812	1		T499	5
values[41]	110	1			T512	2		T812	1		T499	3
values[42]	84	1			T512	2		T812	1		T499	2
values[43]	64	1			T512	1		T812	1		T499	2
values[44]	63	1			T512	3		T812	1		T499	3
values[45]	59	1			T512	4		T812	1		T499	8
values[46]	61	1			T512	3		T812	1		T499	6
values[47]	54	1			T512	3		T812	1		T499	3
values[48]	65	1			T512	4		T812	1		T499	2
values[49]	72	1			T512	1		T812	1		T499	4
values[50]	65	1			T512	3		T812	1		T499	2
values[51]	50	1			T512	4		T812	1		T499	2
values[52]	60	1			T512	2		T812	1		T499	3
values[53]	61	1			T512	3		T812	1		T499	1
values[54]	59	1			T512	2		T812	1		T499	2
values[55]	55	1			T512	1		T812	1		T499	4
values[56]	55	1			T512	2		T812	1		T499	1
values[57]	53	1			T512	3		T812	1		T499	2
values[58]	64	1			T512	6		T812	1		T499	4
values[59]	53	1			T512	3		T812	1		T499	3
values[60]	48	1			T512	2		T812	1		T499	1
values[61]	53	1			T512	2		T812	1		T499	6
values[62]	66	1			T512	4		T812	1		T499	4
values[63]	51	1			T512	1		T812	1		T499	1
values[64]	54	1			T512	5		T812	1		T499	3
values[65]	58	1			T512	2		T812	1		T499	2
values[66]	61	1			T512	4		T812	1		T499	3
values[67]	57	1			T512	1		T812	1		T499	4
values[68]	54	1			T512	3		T812	1		T499	3
values[69]	66	1			T512	4		T812	1		T499	2
values[70]	66	1			T512	1		T812	1		T499	2
values[71]	53	1			T512	4		T812	1		T499	4
values[72]	50	1			T512	1		T812	1		T499	2
values[73]	54	1			T512	2		T812	1		T499	1
values[74]	52	1			T512	1		T812	1		T499	1
values[75]	79	1			T512	4		T812	1		T499	5
values[76]	61	1			T512	1		T812	1		T499	3
values[77]	60	1			T512	3		T812	1		T499	5
values[78]	63	1			T512	2		T812	1		T499	3
values[79]	65	1			T512	1		T812	1		T499	2
values[80]	57	1			T512	1		T812	1		T499	2
values[81]	69	1			T512	3		T812	1		T499	1
values[82]	65	1			T512	3		T812	1		T499	4
values[83]	68	1			T512	1		T812	1		T499	6
values[84]	76	1			T512	1		T812	1		T499	4
values[85]	65	1			T512	2		T812	1		T499	10
values[86]	71	1			T512	2		T812	1		T499	12
values[87]	67	1			T512	3		T812	1		T499	5
values[88]	80	1			T512	1		T812	1		T499	6
values[89]	66	1			T512	4		T812	1		T499	6
values[90]	60	1			T512	3		T812	1		T499	3
values[91]	80	1			T512	5		T812	1		T499	2
values[92]	69	1			T512	3		T812	2		T499	2
values[93]	70	1			T512	3		T812	3		T499	1
values[94]	70	1			T512	2		T812	4		T499	2
values[95]	79	1			T512	3		T812	1		T499	2
values[96]	75	1			T512	1		T812	2		T499	1
values[97]	68	1			T512	2		T812	1		T499	2
values[98]	88	1			T512	2		T812	4		T499	3
values[99]	79	1			T512	1		T812	5		T499	11
values[100]	87	1			T512	1		T812	1		T499	5
values[101]	94	1			T512	2		T812	2		T499	4
values[102]	93	1			T512	3		T812	5		T499	1
values[103]	78	1			T512	3		T812	3		T499	4
values[104]	81	1			T512	4		T812	1		T499	3
values[105]	77	1			T512	1		T812	2		T499	6
values[106]	73	1			T512	1		T812	3		T499	4
values[107]	101	1			T512	5		T812	1		T499	5
values[108]	91	1			T512	3		T812	3		T499	3
values[109]	82	1			T512	4		T812	4		T499	1
values[110]	83	1			T512	1		T812	3		T499	2
values[111]	83	1			T512	3		T812	1		T499	5
values[112]	93	1			T512	3		T812	3		T499	6
values[113]	103	1			T512	4		T812	4		T499	10
values[114]	96	1			T512	7		T812	2		T499	8
values[115]	111	1			T512	11		T812	3		T499	8
values[116]	102	1			T512	1		T812	2		T499	4
values[117]	100	1			T512	3		T812	1		T499	4
values[118]	100	1			T512	4		T812	1		T499	5
values[119]	100	1			T512	6		T812	5		T499	8
values[120]	101	1			T512	1		T812	3		T499	8
values[121]	107	1			T512	1		T812	1		T499	2
values[122]	100	1			T512	3		T812	1		T499	2
values[123]	120	1			T512	12		T812	1		T499	7
values[124]	217	1			T512	21		T812	2		T499	14
values[125]	422	1			T512	73		T812	3		T499	37
values[126]	815	1			T512	94		T812	17		T499	34
values[127]	3080	1			T512	37		T812	123		T499	10
values[128]	5345	1			T512	6		T812	216		T499	1