Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rstmgr_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	136925	1			T71	72		T72	5		T73	22
values[2]	9059	1			T71	1		T222	183		T223	1
values[3]	3473	1			T222	109		T510	6		T466	1
values[4]	2210	1			T222	51		T510	8		T437	71
values[5]	1476	1			T222	28		T510	10		T437	58
values[6]	1070	1			T222	13		T510	7		T437	39
values[7]	721	1			T222	3		T510	7		T437	41
values[8]	575	1			T510	6		T437	19		T422	1
values[9]	409	1			T510	10		T437	11		T422	1
values[10]	333	1			T510	3		T437	15		T422	1
values[11]	328	1			T510	5		T437	8		T422	1
values[12]	277	1			T510	6		T422	1		T606	8
values[13]	268	1			T510	4		T422	1		T840	4
values[14]	224	1			T510	10		T422	1		T840	2
values[15]	203	1			T510	16		T422	1		T840	4
values[16]	242	1			T510	13		T422	1		T840	3
values[17]	214	1			T510	7		T422	1		T840	2
values[18]	248	1			T510	5		T422	1		T840	1
values[19]	187	1			T510	4		T422	1		T840	6
values[20]	248	1			T510	9		T422	1		T840	15
values[21]	214	1			T510	3		T422	1		T840	2
values[22]	214	1			T510	4		T422	1		T840	2
values[23]	250	1			T510	31		T422	1		T840	1
values[24]	246	1			T510	8		T422	1		T840	2
values[25]	235	1			T510	3		T422	1		T840	3
values[26]	217	1			T510	6		T422	1		T840	1
values[27]	224	1			T510	7		T422	1		T840	4
values[28]	224	1			T510	3		T422	1		T840	4
values[29]	241	1			T510	6		T422	1		T840	4
values[30]	193	1			T510	4		T422	1		T840	3
values[31]	214	1			T510	11		T422	1		T840	1
values[32]	238	1			T510	8		T422	1		T840	3
values[33]	247	1			T510	10		T422	1		T840	2
values[34]	218	1			T510	4		T422	1		T840	4
values[35]	214	1			T510	9		T422	1		T840	2
values[36]	212	1			T510	7		T422	1		T840	1
values[37]	239	1			T510	5		T422	1		T840	1
values[38]	185	1			T510	9		T422	1		T840	3
values[39]	222	1			T510	4		T422	1		T840	8
values[40]	198	1			T510	5		T422	1		T840	7
values[41]	211	1			T510	15		T422	1		T840	4
values[42]	202	1			T510	5		T422	1		T840	4
values[43]	213	1			T510	15		T422	1		T840	1
values[44]	220	1			T510	8		T422	1		T840	1
values[45]	241	1			T510	5		T422	1		T840	2
values[46]	244	1			T510	12		T422	1		T840	1
values[47]	302	1			T510	8		T422	1		T840	3
values[48]	206	1			T510	13		T422	1		T840	6
values[49]	213	1			T510	3		T422	1		T840	3
values[50]	239	1			T510	6		T422	1		T840	4
values[51]	273	1			T510	3		T422	1		T840	4
values[52]	241	1			T510	8		T422	1		T840	6
values[53]	220	1			T510	5		T422	1		T840	3
values[54]	181	1			T510	6		T422	1		T840	6
values[55]	219	1			T510	5		T422	1		T840	5
values[56]	200	1			T510	8		T422	1		T840	2
values[57]	218	1			T510	4		T422	1		T840	3
values[58]	192	1			T510	5		T422	1		T840	5
values[59]	181	1			T510	6		T422	1		T840	1
values[60]	176	1			T510	19		T422	1		T840	3
values[61]	162	1			T510	8		T422	1		T840	4
values[62]	139	1			T510	6		T422	1		T840	2
values[63]	130	1			T510	4		T422	1		T840	3
values[64]	146	1			T510	3		T422	1		T840	1
values[65]	150	1			T510	3		T422	1		T840	2
values[66]	164	1			T510	3		T422	1		T840	1
values[67]	163	1			T510	7		T422	1		T840	1
values[68]	174	1			T510	10		T422	1		T840	4
values[69]	169	1			T510	4		T422	1		T840	1
values[70]	174	1			T510	6		T422	1		T840	2
values[71]	153	1			T510	5		T422	1		T840	1
values[72]	143	1			T510	5		T422	1		T840	1
values[73]	159	1			T510	4		T422	1		T840	3
values[74]	156	1			T422	1		T840	9		T838	7
values[75]	166	1			T422	1		T840	2		T838	3
values[76]	122	1			T422	1		T840	1		T838	1
values[77]	108	1			T422	1		T840	3		T838	1
values[78]	131	1			T422	1		T840	2		T838	5
values[79]	106	1			T422	1		T840	2		T838	6
values[80]	106	1			T422	1		T840	2		T838	8
values[81]	118	1			T422	1		T840	2		T838	1
values[82]	117	1			T422	1		T840	1		T838	2
values[83]	126	1			T422	1		T840	2		T838	1
values[84]	118	1			T422	1		T840	2		T838	4
values[85]	121	1			T422	1		T840	6		T838	2
values[86]	128	1			T422	1		T840	1		T838	5
values[87]	114	1			T422	1		T840	2		T838	9
values[88]	130	1			T422	1		T840	3		T838	6
values[89]	124	1			T422	1		T840	2		T838	2
values[90]	130	1			T422	1		T840	1		T838	3
values[91]	113	1			T422	1		T840	2		T838	9
values[92]	138	1			T422	1		T840	2		T838	7
values[93]	117	1			T422	1		T840	2		T838	1
values[94]	119	1			T422	1		T840	2		T534	6
values[95]	132	1			T422	1		T840	6		T534	7
values[96]	131	1			T422	1		T840	2		T534	18
values[97]	136	1			T422	1		T840	6		T534	13
values[98]	143	1			T422	1		T840	5		T534	15
values[99]	88	1			T422	1		T840	6		T534	11
values[100]	100	1			T422	1		T840	6		T534	5
values[101]	99	1			T422	1		T840	5		T534	8
values[102]	101	1			T422	1		T840	13		T534	10
values[103]	87	1			T422	1		T840	5		T534	8
values[104]	101	1			T422	1		T840	5		T534	4
values[105]	81	1			T422	2		T840	1		T534	6
values[106]	75	1			T422	1		T840	2		T534	2
values[107]	95	1			T422	1		T840	3		T534	5
values[108]	92	1			T422	1		T840	7		T534	8
values[109]	75	1			T422	1		T840	3		T534	6
values[110]	71	1			T422	1		T840	2		T534	13
values[111]	76	1			T422	1		T840	2		T534	8
values[112]	87	1			T422	1		T840	2		T534	8
values[113]	73	1			T422	1		T840	1		T534	2
values[114]	73	1			T422	1		T840	4		T534	5
values[115]	52	1			T422	1		T840	3		T534	1
values[116]	67	1			T422	1		T840	2		T534	5
values[117]	73	1			T422	1		T840	1		T534	7
values[118]	65	1			T422	1		T840	2		T534	3
values[119]	58	1			T422	1		T840	2		T534	1
values[120]	56	1			T422	1		T840	2		T839	4
values[121]	64	1			T422	1		T840	1		T839	3
values[122]	49	1			T422	1		T840	1		T839	4
values[123]	62	1			T422	2		T840	4		T839	3
values[124]	61	1			T422	3		T840	7		T839	3
values[125]	83	1			T422	3		T840	11		T839	5
values[126]	126	1			T422	4		T840	25		T839	9
values[127]	832	1			T422	51		T840	72		T839	6
values[128]	6948	1			T422	410		T840	30		T839	4