Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sensor_ctrl_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143211	1			T71	85		T72	6		T73	22
values[2]	11278	1			T73	1		T146	70		T222	2
values[3]	4413	1			T146	37		T504	1		T505	126
values[4]	2498	1			T146	19		T505	76		T509	4
values[5]	1644	1			T146	19		T505	77		T509	1
values[6]	1062	1			T146	4		T505	51		T422	1
values[7]	761	1			T146	9		T505	57		T422	1
values[8]	594	1			T146	16		T505	28		T422	1
values[9]	451	1			T146	3		T505	30		T422	1
values[10]	385	1			T146	4		T505	19		T422	1
values[11]	330	1			T505	4		T422	1		T823	1
values[12]	283	1			T422	1		T823	1		T432	1
values[13]	213	1			T422	1		T823	1		T432	1
values[14]	249	1			T422	1		T823	1		T432	1
values[15]	262	1			T422	2		T823	1		T432	1
values[16]	252	1			T422	1		T823	1		T432	1
values[17]	278	1			T422	1		T823	1		T432	1
values[18]	291	1			T422	1		T823	1		T432	1
values[19]	238	1			T422	1		T823	1		T432	1
values[20]	217	1			T422	1		T823	1		T432	1
values[21]	261	1			T422	1		T823	1		T432	1
values[22]	247	1			T422	1		T823	1		T432	1
values[23]	220	1			T422	1		T823	1		T432	1
values[24]	248	1			T422	1		T823	1		T432	1
values[25]	248	1			T422	1		T823	1		T432	1
values[26]	259	1			T422	1		T823	1		T432	1
values[27]	278	1			T422	1		T823	1		T432	1
values[28]	220	1			T422	1		T823	1		T432	1
values[29]	246	1			T422	1		T823	1		T432	1
values[30]	197	1			T422	1		T823	1		T432	1
values[31]	244	1			T422	1		T823	1		T432	1
values[32]	215	1			T422	1		T823	1		T432	2
values[33]	214	1			T422	1		T823	1		T432	1
values[34]	175	1			T422	1		T823	1		T432	1
values[35]	204	1			T422	1		T823	1		T432	1
values[36]	208	1			T422	1		T823	1		T432	1
values[37]	188	1			T422	1		T823	1		T432	1
values[38]	165	1			T422	1		T823	1		T432	1
values[39]	163	1			T422	1		T823	1		T432	1
values[40]	173	1			T422	1		T823	1		T432	1
values[41]	195	1			T422	1		T823	1		T432	1
values[42]	211	1			T422	1		T823	1		T432	1
values[43]	203	1			T422	1		T823	1		T432	1
values[44]	290	1			T422	1		T823	1		T432	1
values[45]	189	1			T422	1		T823	1		T432	1
values[46]	186	1			T422	1		T823	1		T432	1
values[47]	200	1			T422	1		T823	1		T432	1
values[48]	215	1			T422	1		T823	1		T432	1
values[49]	199	1			T422	1		T823	1		T432	1
values[50]	171	1			T422	1		T823	1		T432	1
values[51]	215	1			T422	1		T823	1		T432	1
values[52]	201	1			T422	1		T823	1		T432	1
values[53]	119	1			T422	1		T823	1		T432	1
values[54]	166	1			T422	1		T823	1		T432	1
values[55]	155	1			T422	1		T823	1		T432	1
values[56]	127	1			T422	1		T823	1		T432	1
values[57]	160	1			T422	1		T823	1		T432	1
values[58]	131	1			T422	1		T823	1		T432	1
values[59]	140	1			T422	1		T823	1		T432	1
values[60]	135	1			T422	1		T823	1		T432	1
values[61]	119	1			T422	1		T823	1		T432	1
values[62]	139	1			T422	1		T823	1		T432	1
values[63]	123	1			T422	1		T823	1		T432	1
values[64]	114	1			T422	1		T823	1		T432	1
values[65]	108	1			T422	1		T823	1		T432	1
values[66]	115	1			T422	1		T823	1		T432	1
values[67]	113	1			T422	1		T823	1		T432	1
values[68]	116	1			T422	1		T823	1		T432	1
values[69]	110	1			T422	1		T823	1		T432	1
values[70]	79	1			T422	1		T823	1		T432	1
values[71]	63	1			T422	1		T823	1		T432	2
values[72]	98	1			T422	1		T823	1		T432	12
values[73]	87	1			T422	1		T823	1		T432	1
values[74]	72	1			T422	1		T823	1		T432	1
values[75]	59	1			T422	1		T823	1		T432	3
values[76]	58	1			T422	1		T823	1		T432	4
values[77]	83	1			T422	1		T823	1		T432	5
values[78]	66	1			T422	1		T823	1		T432	3
values[79]	74	1			T422	1		T823	1		T432	6
values[80]	77	1			T422	1		T823	1		T432	3
values[81]	60	1			T422	1		T823	1		T432	5
values[82]	66	1			T422	1		T823	1		T432	3
values[83]	52	1			T422	1		T823	1		T432	2
values[84]	57	1			T422	1		T823	1		T432	2
values[85]	71	1			T422	1		T823	1		T432	6
values[86]	74	1			T422	1		T823	1		T432	2
values[87]	59	1			T422	1		T823	1		T432	4
values[88]	56	1			T422	1		T823	1		T432	3
values[89]	61	1			T422	1		T823	1		T432	5
values[90]	43	1			T422	1		T823	1		T432	3
values[91]	53	1			T422	1		T823	1		T432	1
values[92]	57	1			T422	1		T823	2		T432	1
values[93]	80	1			T422	1		T823	1		T432	1
values[94]	75	1			T422	1		T823	1		T432	2
values[95]	53	1			T422	1		T823	1		T432	2
values[96]	54	1			T422	1		T823	1		T432	2
values[97]	62	1			T422	1		T823	1		T432	5
values[98]	66	1			T422	1		T823	2		T432	1
values[99]	68	1			T422	1		T823	10		T432	3
values[100]	53	1			T422	1		T823	1		T432	2
values[101]	53	1			T422	1		T823	4		T432	4
values[102]	66	1			T422	7		T823	1		T432	4
values[103]	75	1			T422	1		T823	3		T432	1
values[104]	72	1			T422	4		T823	1		T432	1
values[105]	66	1			T422	2		T823	4		T432	6
values[106]	61	1			T422	1		T823	4		T432	1
values[107]	48	1			T422	1		T823	2		T432	1
values[108]	46	1			T422	4		T823	2		T432	1
values[109]	56	1			T422	2		T823	8		T432	1
values[110]	68	1			T422	4		T823	1		T432	2
values[111]	59	1			T422	1		T823	1		T432	1
values[112]	49	1			T422	11		T823	1		T432	2
values[113]	53	1			T422	4		T823	1		T432	1
values[114]	59	1			T422	2		T823	2		T432	1
values[115]	52	1			T422	1		T823	2		T432	2
values[116]	61	1			T422	3		T823	1		T432	2
values[117]	59	1			T422	1		T823	1		T432	11
values[118]	47	1			T422	5		T823	2		T432	1
values[119]	60	1			T422	1		T823	2		T432	3
values[120]	56	1			T422	2		T823	1		T432	2
values[121]	62	1			T422	4		T823	2		T432	2
values[122]	59	1			T422	1		T823	1		T432	2
values[123]	51	1			T422	1		T823	1		T432	1
values[124]	49	1			T422	2		T823	1		T432	1
values[125]	55	1			T422	1		T823	1		T432	1
values[126]	95	1			T422	4		T823	4		T432	4
values[127]	460	1			T422	29		T823	40		T432	31
values[128]	3761	1			T422	321		T823	308		T432	261