Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_main__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	150867	1			T71	85		T72	5		T73	26
values[2]	4223	1			T146	4		T222	2		T223	1
values[3]	1931	1			T450	17		T432	1		T420	30
values[4]	1439	1			T450	10		T432	1		T420	12
values[5]	1204	1			T450	13		T432	1		T420	3
values[6]	1063	1			T450	14		T432	1		T453	49
values[7]	978	1			T450	20		T432	1		T453	37
values[8]	805	1			T450	12		T432	1		T453	32
values[9]	701	1			T450	5		T432	1		T453	8
values[10]	628	1			T450	11		T432	1		T453	1
values[11]	548	1			T450	2		T432	1		T840	39
values[12]	471	1			T432	1		T840	39		T534	4
values[13]	445	1			T432	1		T840	27		T534	3
values[14]	446	1			T432	1		T840	26		T534	3
values[15]	396	1			T432	1		T840	4		T534	1
values[16]	383	1			T432	1		T840	1		T534	2
values[17]	349	1			T432	1		T534	2		T842	21
values[18]	322	1			T432	1		T534	2		T842	31
values[19]	352	1			T432	1		T534	6		T842	42
values[20]	361	1			T432	1		T534	4		T842	26
values[21]	358	1			T432	1		T534	4		T842	34
values[22]	318	1			T432	1		T534	1		T842	12
values[23]	273	1			T432	1		T534	1		T842	19
values[24]	246	1			T432	1		T534	2		T842	14
values[25]	191	1			T432	1		T534	1		T842	11
values[26]	165	1			T432	1		T534	3		T842	15
values[27]	153	1			T432	1		T534	3		T842	23
values[28]	188	1			T432	1		T534	4		T842	27
values[29]	165	1			T432	1		T534	3		T842	26
values[30]	120	1			T432	1		T534	1		T842	18
values[31]	147	1			T432	1		T534	2		T842	10
values[32]	152	1			T432	1		T534	1		T842	9
values[33]	165	1			T432	1		T534	2		T842	8
values[34]	152	1			T432	1		T534	1		T842	2
values[35]	182	1			T432	1		T534	1		T844	1
values[36]	167	1			T432	1		T534	3		T844	1
values[37]	125	1			T432	1		T534	1		T844	1
values[38]	77	1			T432	1		T534	2		T844	1
values[39]	71	1			T432	1		T534	3		T844	1
values[40]	71	1			T432	1		T534	2		T844	1
values[41]	66	1			T432	1		T534	1		T844	1
values[42]	69	1			T432	1		T534	1		T844	1
values[43]	60	1			T432	1		T534	2		T844	1
values[44]	51	1			T432	1		T534	2		T844	1
values[45]	34	1			T432	1		T534	2		T844	1
values[46]	44	1			T432	1		T534	3		T844	1
values[47]	37	1			T432	1		T534	2		T844	1
values[48]	38	1			T432	1		T534	2		T844	1
values[49]	35	1			T432	1		T534	4		T844	1
values[50]	38	1			T432	1		T534	6		T844	1
values[51]	31	1			T432	1		T534	3		T844	1
values[52]	32	1			T432	1		T534	3		T844	1
values[53]	28	1			T432	1		T534	3		T844	1
values[54]	28	1			T432	1		T534	2		T844	1
values[55]	31	1			T432	1		T534	4		T844	1
values[56]	32	1			T432	1		T534	3		T844	1
values[57]	38	1			T432	1		T534	4		T844	1
values[58]	44	1			T432	1		T534	3		T844	1
values[59]	44	1			T432	1		T534	1		T844	1
values[60]	36	1			T432	1		T534	2		T844	1
values[61]	44	1			T432	1		T534	3		T844	1
values[62]	32	1			T432	1		T534	2		T844	1
values[63]	36	1			T432	1		T534	1		T844	1
values[64]	30	1			T432	1		T534	3		T844	1
values[65]	27	1			T432	1		T534	1		T844	1
values[66]	29	1			T432	1		T534	3		T844	1
values[67]	35	1			T432	1		T534	3		T844	1
values[68]	33	1			T432	1		T534	1		T844	1
values[69]	29	1			T432	1		T534	1		T844	1
values[70]	33	1			T432	1		T534	2		T844	1
values[71]	36	1			T432	1		T534	6		T844	1
values[72]	31	1			T432	1		T534	3		T844	1
values[73]	43	1			T432	1		T534	7		T844	1
values[74]	33	1			T432	1		T534	1		T844	1
values[75]	26	1			T432	1		T534	2		T844	1
values[76]	28	1			T432	1		T534	1		T844	1
values[77]	36	1			T432	1		T534	1		T844	1
values[78]	33	1			T432	1		T534	1		T844	1
values[79]	33	1			T432	1		T534	2		T844	1
values[80]	29	1			T432	1		T534	1		T844	1
values[81]	31	1			T432	1		T534	4		T844	1
values[82]	32	1			T432	1		T534	3		T844	1
values[83]	31	1			T432	1		T534	4		T844	1
values[84]	35	1			T432	1		T534	1		T844	1
values[85]	41	1			T432	1		T534	3		T844	1
values[86]	38	1			T432	1		T534	4		T844	1
values[87]	35	1			T432	1		T534	2		T844	1
values[88]	39	1			T432	1		T534	4		T844	1
values[89]	44	1			T432	1		T534	6		T844	1
values[90]	33	1			T432	1		T534	2		T844	1
values[91]	41	1			T432	2		T534	8		T844	1
values[92]	37	1			T432	2		T534	3		T844	1
values[93]	45	1			T432	3		T534	1		T844	1
values[94]	44	1			T432	3		T534	1		T844	1
values[95]	45	1			T432	1		T534	4		T844	1
values[96]	52	1			T432	1		T534	3		T844	1
values[97]	49	1			T432	1		T534	4		T844	1
values[98]	59	1			T432	2		T534	5		T844	1
values[99]	44	1			T432	1		T534	2		T844	2
values[100]	62	1			T432	1		T534	2		T844	3
values[101]	53	1			T432	3		T534	1		T844	2
values[102]	50	1			T432	2		T534	2		T844	2
values[103]	65	1			T432	2		T534	1		T844	2
values[104]	60	1			T432	1		T534	4		T844	4
values[105]	54	1			T432	1		T534	1		T844	2
values[106]	44	1			T432	3		T534	1		T844	3
values[107]	40	1			T432	3		T534	1		T844	2
values[108]	55	1			T432	2		T534	1		T844	4
values[109]	64	1			T432	2		T534	4		T844	2
values[110]	58	1			T432	3		T534	5		T844	1
values[111]	59	1			T432	3		T534	6		T844	3
values[112]	69	1			T432	1		T534	5		T844	4
values[113]	56	1			T432	3		T534	7		T844	4
values[114]	61	1			T432	1		T534	9		T844	4
values[115]	58	1			T432	2		T534	12		T844	3
values[116]	55	1			T432	2		T534	3		T844	5
values[117]	69	1			T432	1		T534	2		T844	1
values[118]	57	1			T432	3		T534	7		T844	1
values[119]	55	1			T432	3		T534	1		T844	1
values[120]	44	1			T432	3		T534	4		T844	2
values[121]	53	1			T432	1		T534	4		T844	6
values[122]	56	1			T432	2		T534	3		T844	1
values[123]	46	1			T432	6		T534	5		T844	1
values[124]	83	1			T432	2		T534	10		T844	4
values[125]	199	1			T432	2		T534	9		T844	5
values[126]	457	1			T432	23		T534	21		T844	18
values[127]	1928	1			T432	96		T534	21		T844	154
values[128]	3260	1			T432	154		T844	179		T849	144