Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	137876	1			T71	89		T72	13		T73	26
values[2]	9179	1			T73	1		T146	1		T222	4
values[3]	3533	1			T505	1		T406	5		T509	8
values[4]	2174	1			T505	2		T406	1		T509	1
values[5]	1384	1			T505	6		T509	1		T606	3
values[6]	866	1			T505	2		T509	2		T606	2
values[7]	525	1			T505	5		T509	2		T606	3
values[8]	391	1			T505	3		T509	6		T606	4
values[9]	325	1			T505	2		T509	2		T606	4
values[10]	285	1			T505	1		T606	2		T419	1
values[11]	255	1			T505	7		T606	3		T419	1
values[12]	208	1			T505	6		T606	1		T419	1
values[13]	273	1			T505	8		T606	2		T419	1
values[14]	241	1			T505	5		T606	1		T419	1
values[15]	259	1			T505	2		T606	2		T419	1
values[16]	206	1			T505	6		T606	4		T419	1
values[17]	211	1			T505	2		T606	2		T419	1
values[18]	213	1			T505	1		T606	2		T419	1
values[19]	199	1			T505	1		T606	2		T419	1
values[20]	249	1			T505	3		T606	1		T419	1
values[21]	197	1			T505	3		T606	2		T419	1
values[22]	232	1			T505	2		T606	4		T419	1
values[23]	213	1			T505	2		T606	1		T419	1
values[24]	213	1			T505	3		T606	1		T419	1
values[25]	186	1			T505	1		T606	2		T419	1
values[26]	214	1			T505	2		T606	7		T419	1
values[27]	233	1			T505	2		T606	7		T419	1
values[28]	180	1			T505	2		T606	9		T419	1
values[29]	152	1			T505	1		T606	1		T419	1
values[30]	220	1			T505	3		T606	2		T419	1
values[31]	165	1			T505	2		T606	1		T419	1
values[32]	201	1			T505	3		T606	1		T419	1
values[33]	218	1			T505	2		T606	2		T419	1
values[34]	197	1			T505	8		T606	5		T419	1
values[35]	233	1			T505	7		T606	2		T419	1
values[36]	226	1			T505	15		T606	10		T419	1
values[37]	236	1			T505	12		T606	5		T419	1
values[38]	231	1			T505	3		T606	3		T419	1
values[39]	182	1			T505	3		T606	4		T419	1
values[40]	172	1			T505	2		T606	2		T419	1
values[41]	192	1			T505	2		T606	2		T419	1
values[42]	156	1			T505	1		T606	1		T419	1
values[43]	173	1			T505	2		T606	2		T419	1
values[44]	179	1			T505	3		T606	1		T419	1
values[45]	219	1			T505	1		T606	4		T419	1
values[46]	233	1			T505	4		T606	3		T419	1
values[47]	199	1			T505	6		T606	3		T419	1
values[48]	223	1			T505	7		T606	4		T419	1
values[49]	190	1			T505	12		T606	4		T419	1
values[50]	211	1			T505	3		T606	2		T419	1
values[51]	207	1			T505	1		T606	2		T419	1
values[52]	143	1			T505	2		T606	1		T419	1
values[53]	171	1			T505	2		T606	4		T419	1
values[54]	150	1			T505	2		T606	3		T419	1
values[55]	172	1			T505	2		T606	2		T419	1
values[56]	147	1			T505	6		T606	5		T419	1
values[57]	150	1			T505	9		T606	5		T419	1
values[58]	164	1			T505	1		T606	2		T419	1
values[59]	117	1			T505	1		T606	1		T419	1
values[60]	152	1			T505	3		T606	1		T419	1
values[61]	135	1			T505	3		T606	1		T419	1
values[62]	153	1			T505	3		T606	3		T419	1
values[63]	160	1			T505	2		T606	3		T419	1
values[64]	125	1			T505	8		T606	1		T419	1
values[65]	148	1			T505	6		T606	7		T419	1
values[66]	139	1			T505	5		T606	3		T419	1
values[67]	116	1			T505	9		T606	4		T419	1
values[68]	112	1			T505	1		T606	1		T419	1
values[69]	113	1			T505	1		T606	1		T419	1
values[70]	90	1			T505	4		T606	2		T419	1
values[71]	77	1			T505	7		T606	4		T419	1
values[72]	81	1			T505	5		T606	1		T419	1
values[73]	84	1			T505	3		T606	3		T419	1
values[74]	102	1			T505	8		T606	1		T419	1
values[75]	83	1			T505	9		T606	2		T419	1
values[76]	85	1			T505	7		T606	6		T419	1
values[77]	84	1			T505	5		T606	12		T419	1
values[78]	86	1			T505	7		T606	3		T419	1
values[79]	97	1			T505	3		T606	1		T419	1
values[80]	81	1			T505	2		T606	3		T419	1
values[81]	77	1			T505	2		T606	1		T419	1
values[82]	69	1			T505	4		T606	2		T419	1
values[83]	60	1			T505	1		T606	1		T419	1
values[84]	69	1			T505	3		T606	7		T419	1
values[85]	85	1			T505	6		T606	3		T419	1
values[86]	83	1			T505	1		T606	3		T419	1
values[87]	87	1			T505	2		T606	4		T419	1
values[88]	86	1			T505	3		T606	9		T419	1
values[89]	71	1			T505	2		T606	4		T419	1
values[90]	78	1			T505	6		T606	3		T419	1
values[91]	90	1			T505	4		T606	3		T419	1
values[92]	58	1			T505	2		T606	1		T419	1
values[93]	67	1			T505	9		T606	1		T419	1
values[94]	89	1			T505	13		T606	6		T419	4
values[95]	89	1			T505	10		T606	6		T419	6
values[96]	54	1			T505	2		T606	3		T419	5
values[97]	52	1			T505	2		T606	4		T419	1
values[98]	58	1			T505	8		T606	2		T419	1
values[99]	65	1			T505	12		T606	2		T419	3
values[100]	69	1			T505	11		T606	3		T419	3
values[101]	80	1			T505	3		T606	8		T419	1
values[102]	58	1			T505	3		T606	2		T419	1
values[103]	72	1			T505	9		T606	2		T419	3
values[104]	65	1			T505	1		T606	3		T419	3
values[105]	68	1			T505	1		T606	9		T419	1
values[106]	61	1			T505	5		T606	11		T419	1
values[107]	70	1			T505	6		T606	4		T419	3
values[108]	54	1			T505	3		T606	3		T419	1
values[109]	58	1			T505	4		T606	2		T419	2
values[110]	65	1			T505	4		T606	6		T419	1
values[111]	80	1			T505	2		T606	6		T419	4
values[112]	64	1			T505	3		T606	4		T419	1
values[113]	51	1			T505	2		T606	5		T419	3
values[114]	54	1			T505	3		T606	11		T419	2
values[115]	49	1			T505	1		T606	7		T419	1
values[116]	65	1			T505	3		T606	4		T419	2
values[117]	53	1			T505	1		T606	1		T419	4
values[118]	71	1			T505	3		T606	5		T419	2
values[119]	67	1			T505	9		T606	2		T419	1
values[120]	51	1			T505	2		T606	3		T419	1
values[121]	71	1			T505	3		T606	7		T419	2
values[122]	61	1			T505	3		T606	5		T419	2
values[123]	69	1			T505	2		T606	3		T419	1
values[124]	65	1			T505	3		T606	3		T419	2
values[125]	93	1			T505	2		T606	7		T419	2
values[126]	147	1			T606	26		T419	1		T845	18
values[127]	743	1			T606	44		T419	37		T845	27
values[128]	4749	1			T606	27		T419	337		T845	9