Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=49}
Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=49}
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
50 |
0 |
50 |
100.00 |
Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=49}
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_dev |
50 |
0 |
50 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_dev
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
50 |
0 |
50 |
100.00 |
User Defined Bins for cp_dev
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| bin_others |
0 |
Illegal |
Covered bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| all_values[0] |
433 |
1 |
|
|
T437 |
5 |
|
T605 |
1 |
|
T406 |
5 |
| all_values[1] |
432 |
1 |
|
|
T510 |
1 |
|
T514 |
1 |
|
T437 |
5 |
| all_values[2] |
481 |
1 |
|
|
T510 |
1 |
|
T399 |
1 |
|
T505 |
1 |
| all_values[3] |
439 |
1 |
|
|
T146 |
1 |
|
T222 |
1 |
|
T399 |
2 |
| all_values[4] |
415 |
1 |
|
|
T146 |
1 |
|
T437 |
2 |
|
T406 |
2 |
| all_values[5] |
458 |
1 |
|
|
T510 |
1 |
|
T399 |
2 |
|
T437 |
2 |
| all_values[6] |
438 |
1 |
|
|
T146 |
1 |
|
T437 |
6 |
|
T406 |
1 |
| all_values[7] |
476 |
1 |
|
|
T510 |
2 |
|
T399 |
1 |
|
T437 |
4 |
| all_values[8] |
454 |
1 |
|
|
T146 |
1 |
|
T510 |
1 |
|
T399 |
1 |
| all_values[9] |
460 |
1 |
|
|
T146 |
1 |
|
T510 |
2 |
|
T399 |
1 |
| all_values[10] |
432 |
1 |
|
|
T510 |
3 |
|
T399 |
1 |
|
T437 |
1 |
| all_values[11] |
405 |
1 |
|
|
T146 |
2 |
|
T510 |
1 |
|
T399 |
2 |
| all_values[12] |
473 |
1 |
|
|
T510 |
3 |
|
T399 |
1 |
|
T505 |
1 |
| all_values[13] |
399 |
1 |
|
|
T510 |
4 |
|
T399 |
1 |
|
T505 |
1 |
| all_values[14] |
437 |
1 |
|
|
T222 |
1 |
|
T399 |
1 |
|
T437 |
4 |
| all_values[15] |
439 |
1 |
|
|
T222 |
2 |
|
T510 |
2 |
|
T437 |
3 |
| all_values[16] |
436 |
1 |
|
|
T510 |
1 |
|
T399 |
3 |
|
T605 |
1 |
| all_values[17] |
435 |
1 |
|
|
T146 |
1 |
|
T510 |
4 |
|
T399 |
1 |
| all_values[18] |
427 |
1 |
|
|
T146 |
1 |
|
T399 |
1 |
|
T437 |
2 |
| all_values[19] |
463 |
1 |
|
|
T510 |
1 |
|
T399 |
5 |
|
T514 |
1 |
| all_values[20] |
432 |
1 |
|
|
T510 |
1 |
|
T406 |
1 |
|
T468 |
1 |
| all_values[21] |
404 |
1 |
|
|
T510 |
2 |
|
T399 |
1 |
|
T437 |
3 |
| all_values[22] |
477 |
1 |
|
|
T510 |
1 |
|
T437 |
3 |
|
T605 |
1 |
| all_values[23] |
435 |
1 |
|
|
T510 |
1 |
|
T437 |
4 |
|
T605 |
2 |
| all_values[24] |
439 |
1 |
|
|
T146 |
1 |
|
T510 |
3 |
|
T437 |
2 |
| all_values[25] |
431 |
1 |
|
|
T146 |
1 |
|
T222 |
1 |
|
T510 |
1 |
| all_values[26] |
442 |
1 |
|
|
T510 |
2 |
|
T399 |
2 |
|
T437 |
2 |
| all_values[27] |
487 |
1 |
|
|
T510 |
2 |
|
T505 |
1 |
|
T406 |
3 |
| all_values[28] |
469 |
1 |
|
|
T146 |
1 |
|
T510 |
1 |
|
T399 |
2 |
| all_values[29] |
433 |
1 |
|
|
T510 |
2 |
|
T399 |
2 |
|
T505 |
1 |
| all_values[30] |
464 |
1 |
|
|
T146 |
1 |
|
T510 |
1 |
|
T514 |
1 |
| all_values[31] |
446 |
1 |
|
|
T146 |
1 |
|
T510 |
1 |
|
T399 |
2 |
| all_values[32] |
449 |
1 |
|
|
T399 |
1 |
|
T505 |
1 |
|
T437 |
3 |
| all_values[33] |
462 |
1 |
|
|
T146 |
1 |
|
T510 |
3 |
|
T399 |
1 |
| all_values[34] |
434 |
1 |
|
|
T510 |
2 |
|
T399 |
3 |
|
T514 |
1 |
| all_values[35] |
442 |
1 |
|
|
T510 |
1 |
|
T399 |
1 |
|
T437 |
1 |
| all_values[36] |
465 |
1 |
|
|
T222 |
1 |
|
T510 |
3 |
|
T399 |
1 |
| all_values[37] |
470 |
1 |
|
|
T146 |
2 |
|
T510 |
3 |
|
T437 |
3 |
| all_values[38] |
451 |
1 |
|
|
T510 |
1 |
|
T399 |
1 |
|
T505 |
1 |
| all_values[39] |
466 |
1 |
|
|
T222 |
1 |
|
T510 |
2 |
|
T399 |
2 |
| all_values[40] |
479 |
1 |
|
|
T146 |
1 |
|
T510 |
3 |
|
T399 |
1 |
| all_values[41] |
443 |
1 |
|
|
T510 |
1 |
|
T437 |
4 |
|
T406 |
2 |
| all_values[42] |
480 |
1 |
|
|
T146 |
1 |
|
T510 |
1 |
|
T399 |
3 |
| all_values[43] |
397 |
1 |
|
|
T510 |
2 |
|
T505 |
1 |
|
T437 |
6 |
| all_values[44] |
433 |
1 |
|
|
T510 |
2 |
|
T399 |
1 |
|
T505 |
1 |
| all_values[45] |
442 |
1 |
|
|
T399 |
3 |
|
T505 |
1 |
|
T437 |
4 |
| all_values[46] |
475 |
1 |
|
|
T146 |
1 |
|
T510 |
4 |
|
T399 |
2 |
| all_values[47] |
455 |
1 |
|
|
T510 |
1 |
|
T505 |
1 |
|
T437 |
2 |
| all_values[48] |
453 |
1 |
|
|
T510 |
3 |
|
T437 |
5 |
|
T509 |
1 |
| all_values[49] |
489 |
1 |
|
|
T146 |
1 |
|
T510 |
1 |
|
T399 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |