Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	127131	1			T75	5		T76	40		T77	40
values[2]	9382	1			T410	1		T416	57		T395	288
values[3]	3553	1			T416	10		T395	235		T415	1
values[4]	1851	1			T416	5		T395	107		T422	1
values[5]	1156	1			T416	3		T395	45		T422	1
values[6]	900	1			T416	3		T395	23		T422	1
values[7]	614	1			T416	2		T422	1		T455	20
values[8]	531	1			T416	5		T422	1		T455	18
values[9]	430	1			T416	3		T422	1		T455	5
values[10]	340	1			T416	1		T422	1		T455	1
values[11]	325	1			T416	1		T422	1		T445	3
values[12]	270	1			T416	1		T422	1		T445	14
values[13]	235	1			T422	1		T445	8		T450	3
values[14]	286	1			T422	1		T445	5		T450	4
values[15]	259	1			T422	1		T445	8		T450	5
values[16]	282	1			T422	1		T445	5		T450	6
values[17]	269	1			T422	1		T445	11		T450	8
values[18]	233	1			T422	1		T445	5		T450	8
values[19]	237	1			T422	1		T445	6		T450	2
values[20]	260	1			T422	1		T445	6		T450	3
values[21]	311	1			T422	1		T445	18		T450	1
values[22]	248	1			T422	1		T445	9		T450	2
values[23]	231	1			T422	1		T445	8		T450	1
values[24]	263	1			T422	1		T445	4		T450	3
values[25]	215	1			T422	1		T445	3		T450	3
values[26]	251	1			T422	1		T445	4		T450	2
values[27]	265	1			T422	1		T445	8		T450	7
values[28]	257	1			T422	1		T445	5		T450	4
values[29]	259	1			T422	1		T445	5		T450	7
values[30]	279	1			T422	1		T445	10		T450	5
values[31]	258	1			T422	1		T445	6		T450	5
values[32]	263	1			T422	1		T445	4		T450	2
values[33]	220	1			T422	1		T445	11		T450	2
values[34]	241	1			T422	1		T445	15		T450	1
values[35]	233	1			T422	1		T445	9		T450	1
values[36]	269	1			T422	1		T445	5		T450	2
values[37]	251	1			T422	1		T445	9		T450	2
values[38]	232	1			T422	1		T445	3		T450	3
values[39]	262	1			T422	1		T445	5		T450	7
values[40]	246	1			T422	1		T445	5		T450	8
values[41]	260	1			T422	2		T445	5		T450	2
values[42]	258	1			T422	1		T445	13		T450	2
values[43]	220	1			T422	1		T445	7		T450	2
values[44]	224	1			T422	1		T445	7		T450	2
values[45]	232	1			T422	1		T445	8		T450	1
values[46]	258	1			T422	1		T445	9		T450	1
values[47]	211	1			T422	1		T445	5		T450	3
values[48]	220	1			T422	1		T445	5		T450	1
values[49]	186	1			T422	1		T445	4		T450	3
values[50]	184	1			T422	1		T445	15		T450	5
values[51]	141	1			T422	1		T445	10		T450	2
values[52]	165	1			T422	1		T445	15		T450	11
values[53]	152	1			T422	1		T445	6		T450	9
values[54]	180	1			T422	1		T445	16		T450	2
values[55]	189	1			T422	1		T445	8		T450	1
values[56]	176	1			T422	1		T445	3		T423	23
values[57]	122	1			T422	1		T445	9		T423	7
values[58]	125	1			T422	1		T445	9		T423	5
values[59]	107	1			T422	1		T445	4		T423	11
values[60]	131	1			T422	1		T445	12		T423	3
values[61]	143	1			T422	1		T445	5		T423	4
values[62]	131	1			T422	1		T445	4		T423	11
values[63]	116	1			T422	1		T423	8		T812	2
values[64]	109	1			T422	1		T423	6		T812	3
values[65]	121	1			T422	1		T423	3		T812	3
values[66]	122	1			T422	1		T423	7		T812	4
values[67]	129	1			T422	1		T423	8		T812	4
values[68]	103	1			T422	1		T423	1		T812	2
values[69]	66	1			T422	1		T812	3		T484	2
values[70]	45	1			T422	1		T812	1		T484	2
values[71]	40	1			T422	1		T812	1		T484	2
values[72]	54	1			T422	1		T812	2		T484	1
values[73]	59	1			T422	1		T812	2		T484	1
values[74]	44	1			T422	1		T812	1		T484	1
values[75]	39	1			T422	1		T812	2		T484	4
values[76]	32	1			T422	1		T812	2		T484	1
values[77]	41	1			T422	1		T812	2		T484	3
values[78]	36	1			T422	1		T812	4		T484	2
values[79]	30	1			T422	1		T812	3		T484	2
values[80]	34	1			T422	1		T812	3		T484	1
values[81]	29	1			T422	1		T812	4		T484	1
values[82]	40	1			T422	1		T812	4		T484	2
values[83]	44	1			T422	1		T812	3		T484	1
values[84]	34	1			T422	1		T812	4		T484	5
values[85]	35	1			T422	1		T812	3		T484	2
values[86]	33	1			T422	1		T812	2		T484	2
values[87]	34	1			T422	1		T812	8		T484	2
values[88]	31	1			T422	1		T812	2		T484	2
values[89]	52	1			T422	1		T812	9		T484	2
values[90]	57	1			T422	1		T812	7		T484	9
values[91]	52	1			T422	1		T812	4		T484	5
values[92]	55	1			T422	1		T812	9		T484	10
values[93]	52	1			T422	1		T812	1		T484	3
values[94]	31	1			T422	1		T812	1		T484	1
values[95]	37	1			T422	1		T812	5		T484	1
values[96]	24	1			T422	1		T812	2		T484	3
values[97]	39	1			T422	1		T812	12		T484	3
values[98]	32	1			T422	1		T812	9		T484	2
values[99]	36	1			T422	1		T812	15		T484	3
values[100]	26	1			T422	1		T812	5		T484	2
values[101]	32	1			T422	1		T812	2		T484	4
values[102]	37	1			T422	1		T812	3		T484	6
values[103]	36	1			T422	1		T812	6		T484	4
values[104]	32	1			T422	1		T812	2		T484	5
values[105]	24	1			T422	1		T484	3		T833	1
values[106]	41	1			T422	1		T484	8		T833	1
values[107]	40	1			T422	1		T484	5		T833	1
values[108]	44	1			T422	1		T484	2		T833	4
values[109]	45	1			T422	1		T484	1		T833	1
values[110]	33	1			T422	1		T484	3		T833	2
values[111]	29	1			T422	1		T484	2		T833	2
values[112]	29	1			T422	1		T484	4		T833	1
values[113]	36	1			T422	1		T484	4		T833	6
values[114]	26	1			T422	1		T484	4		T833	4
values[115]	18	1			T422	1		T484	4		T833	2
values[116]	19	1			T422	1		T484	5		T833	1
values[117]	18	1			T422	1		T484	6		T833	1
values[118]	17	1			T422	1		T484	5		T833	3
values[119]	24	1			T422	1		T484	3		T833	3
values[120]	26	1			T422	2		T484	2		T833	1
values[121]	23	1			T422	2		T484	5		T833	3
values[122]	22	1			T422	1		T484	1		T833	4
values[123]	28	1			T422	2		T484	6		T833	2
values[124]	32	1			T422	4		T484	4		T833	1
values[125]	21	1			T422	2		T484	9		T833	2
values[126]	45	1			T422	5		T484	16		T833	5
values[127]	274	1			T422	38		T484	55		T833	34
values[128]	2070	1			T422	340		T484	44		T833	288