Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138948	1			T68	12		T69	24		T70	4
values[2]	9599	1			T75	3		T503	4		T427	2
values[3]	3995	1			T503	1		T607	7		T748	5
values[4]	2241	1			T607	16		T748	9		T756	2
values[5]	1354	1			T607	2		T748	3		T756	1
values[6]	914	1			T748	10		T756	1		T513	16
values[7]	775	1			T748	9		T756	2		T513	18
values[8]	498	1			T748	5		T756	1		T513	16
values[9]	414	1			T748	12		T756	2		T513	17
values[10]	443	1			T748	6		T756	3		T513	10
values[11]	457	1			T748	7		T756	8		T513	8
values[12]	404	1			T748	4		T756	8		T513	6
values[13]	324	1			T748	6		T756	3		T513	8
values[14]	422	1			T748	12		T756	1		T513	11
values[15]	344	1			T748	3		T756	2		T513	6
values[16]	324	1			T748	4		T756	3		T513	8
values[17]	394	1			T748	4		T756	5		T513	17
values[18]	395	1			T748	2		T756	7		T513	5
values[19]	359	1			T748	6		T756	6		T513	6
values[20]	355	1			T748	6		T756	5		T513	2
values[21]	419	1			T748	23		T756	4		T513	6
values[22]	388	1			T748	10		T756	5		T513	3
values[23]	379	1			T748	3		T756	3		T513	2
values[24]	315	1			T748	6		T756	2		T513	2
values[25]	324	1			T748	3		T756	7		T513	7
values[26]	322	1			T748	4		T756	3		T513	6
values[27]	308	1			T748	7		T756	5		T513	3
values[28]	326	1			T748	8		T756	2		T513	1
values[29]	355	1			T748	9		T756	2		T513	1
values[30]	377	1			T748	12		T756	4		T513	1
values[31]	342	1			T748	12		T756	5		T513	2
values[32]	341	1			T748	11		T756	2		T513	5
values[33]	365	1			T748	6		T756	3		T513	4
values[34]	329	1			T748	3		T756	2		T513	3
values[35]	425	1			T748	6		T756	2		T513	5
values[36]	357	1			T748	3		T756	3		T513	11
values[37]	390	1			T748	4		T756	6		T513	6
values[38]	368	1			T748	10		T756	7		T513	2
values[39]	377	1			T748	5		T756	6		T513	1
values[40]	337	1			T748	3		T756	4		T513	1
values[41]	343	1			T748	21		T756	4		T513	2
values[42]	293	1			T748	26		T756	3		T513	1
values[43]	318	1			T748	7		T756	2		T513	2
values[44]	340	1			T748	7		T756	1		T513	1
values[45]	340	1			T748	12		T756	3		T513	5
values[46]	271	1			T748	4		T756	6		T513	1
values[47]	326	1			T748	5		T756	3		T513	4
values[48]	241	1			T748	4		T756	1		T513	2
values[49]	293	1			T748	3		T756	1		T513	1
values[50]	301	1			T748	4		T756	3		T513	1
values[51]	316	1			T748	6		T756	6		T513	2
values[52]	294	1			T748	13		T756	1		T513	3
values[53]	286	1			T748	9		T756	7		T513	1
values[54]	313	1			T748	11		T756	1		T513	2
values[55]	298	1			T748	5		T756	5		T513	3
values[56]	338	1			T748	5		T756	3		T513	3
values[57]	259	1			T748	6		T756	3		T513	1
values[58]	276	1			T748	8		T756	5		T513	1
values[59]	278	1			T748	5		T756	9		T513	2
values[60]	256	1			T748	5		T756	4		T513	1
values[61]	239	1			T748	12		T756	5		T513	2
values[62]	238	1			T748	9		T756	6		T513	2
values[63]	249	1			T756	7		T513	8		T642	1
values[64]	247	1			T756	2		T513	8		T642	1
values[65]	231	1			T756	4		T513	3		T642	1
values[66]	238	1			T756	3		T513	6		T642	1
values[67]	191	1			T756	1		T513	7		T642	1
values[68]	180	1			T756	3		T513	4		T642	1
values[69]	151	1			T756	2		T513	6		T642	1
values[70]	140	1			T756	5		T513	5		T642	1
values[71]	110	1			T756	11		T513	1		T642	1
values[72]	141	1			T756	1		T513	1		T642	1
values[73]	137	1			T756	2		T513	2		T642	1
values[74]	74	1			T756	2		T513	4		T642	1
values[75]	71	1			T756	4		T513	3		T642	1
values[76]	75	1			T756	2		T513	4		T642	1
values[77]	86	1			T756	3		T513	5		T642	1
values[78]	53	1			T756	1		T513	4		T642	1
values[79]	54	1			T756	2		T513	2		T642	4
values[80]	72	1			T756	7		T513	3		T642	1
values[81]	64	1			T756	9		T513	1		T642	2
values[82]	74	1			T756	5		T513	9		T642	4
values[83]	74	1			T756	1		T513	6		T642	7
values[84]	67	1			T756	2		T513	2		T642	4
values[85]	54	1			T756	5		T513	2		T642	2
values[86]	56	1			T756	3		T513	3		T642	3
values[87]	58	1			T756	4		T513	1		T642	3
values[88]	66	1			T756	7		T513	1		T642	1
values[89]	72	1			T756	6		T513	3		T642	3
values[90]	92	1			T756	5		T513	2		T642	3
values[91]	65	1			T756	1		T513	3		T642	2
values[92]	75	1			T756	6		T513	1		T642	4
values[93]	94	1			T756	6		T513	2		T642	2
values[94]	83	1			T756	13		T513	3		T642	5
values[95]	95	1			T756	7		T513	1		T642	5
values[96]	94	1			T756	5		T513	5		T642	3
values[97]	77	1			T756	3		T513	3		T642	1
values[98]	92	1			T756	4		T513	1		T642	1
values[99]	85	1			T756	2		T513	2		T642	7
values[100]	105	1			T756	13		T513	1		T642	2
values[101]	92	1			T756	6		T513	4		T642	2
values[102]	86	1			T756	3		T513	13		T642	2
values[103]	87	1			T756	3		T513	7		T642	1
values[104]	91	1			T756	4		T513	7		T642	1
values[105]	80	1			T756	2		T513	2		T642	2
values[106]	82	1			T756	5		T513	2		T642	11
values[107]	97	1			T756	2		T513	3		T642	3
values[108]	100	1			T756	4		T513	5		T642	4
values[109]	86	1			T756	7		T513	3		T642	1
values[110]	71	1			T756	8		T513	4		T642	2
values[111]	86	1			T756	3		T513	7		T642	4
values[112]	91	1			T756	4		T513	7		T642	2
values[113]	78	1			T756	3		T513	2		T642	2
values[114]	73	1			T756	5		T513	3		T642	2
values[115]	105	1			T756	5		T513	3		T642	3
values[116]	85	1			T756	2		T513	6		T642	2
values[117]	81	1			T756	2		T513	3		T642	4
values[118]	72	1			T756	5		T513	1		T642	3
values[119]	76	1			T756	2		T513	3		T642	3
values[120]	72	1			T513	2		T642	5		T420	2
values[121]	66	1			T513	3		T642	1		T420	1
values[122]	69	1			T513	4		T642	2		T420	1
values[123]	77	1			T513	2		T642	5		T420	3
values[124]	81	1			T513	6		T642	2		T420	2
values[125]	86	1			T513	13		T642	1		T420	3
values[126]	135	1			T513	24		T642	2		T420	2
values[127]	1091	1			T513	39		T642	33		T420	43
values[128]	9503	1			T513	13		T642	246		T420	328