Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	162035	1			T68	3		T69	19		T70	13
values[2]	4074	1			T75	4		T412	2		T503	2
values[3]	1984	1			T503	1		T509	23		T398	39
values[4]	1507	1			T509	11		T398	12		T422	3
values[5]	1355	1			T398	7		T422	4		T513	17
values[6]	1293	1			T398	8		T422	3		T513	7
values[7]	1105	1			T398	11		T422	1		T751	5
values[8]	1122	1			T398	17		T422	1		T751	7
values[9]	1045	1			T398	1		T422	1		T751	12
values[10]	861	1			T398	3		T422	4		T751	6
values[11]	791	1			T422	1		T751	20		T642	1
values[12]	674	1			T422	4		T751	10		T642	1
values[13]	588	1			T422	1		T751	5		T642	1
values[14]	493	1			T422	1		T751	7		T642	1
values[15]	434	1			T422	3		T751	24		T642	1
values[16]	388	1			T422	4		T751	25		T642	1
values[17]	344	1			T422	4		T751	21		T642	1
values[18]	275	1			T422	4		T751	10		T642	1
values[19]	292	1			T422	1		T751	6		T642	1
values[20]	314	1			T422	2		T751	5		T642	1
values[21]	324	1			T422	3		T751	3		T642	1
values[22]	267	1			T422	1		T751	3		T642	1
values[23]	274	1			T422	1		T751	2		T642	1
values[24]	308	1			T422	2		T751	6		T642	1
values[25]	280	1			T422	6		T751	3		T642	1
values[26]	191	1			T422	4		T751	1		T642	1
values[27]	204	1			T422	3		T751	1		T642	1
values[28]	202	1			T422	2		T751	5		T642	1
values[29]	167	1			T422	2		T751	11		T642	1
values[30]	135	1			T422	3		T751	8		T642	1
values[31]	143	1			T422	1		T751	5		T642	1
values[32]	117	1			T422	1		T751	6		T642	1
values[33]	142	1			T422	3		T751	29		T642	1
values[34]	168	1			T422	3		T751	48		T642	1
values[35]	173	1			T422	4		T751	39		T642	1
values[36]	145	1			T422	2		T751	19		T642	1
values[37]	93	1			T422	5		T751	6		T642	1
values[38]	90	1			T422	5		T751	17		T642	1
values[39]	83	1			T422	1		T751	18		T642	1
values[40]	68	1			T422	1		T751	4		T642	1
values[41]	67	1			T422	1		T642	1		T738	1
values[42]	67	1			T422	3		T642	1		T738	1
values[43]	62	1			T422	5		T642	1		T738	1
values[44]	57	1			T422	2		T642	1		T738	1
values[45]	61	1			T422	2		T642	1		T738	1
values[46]	61	1			T422	2		T642	1		T738	1
values[47]	70	1			T422	8		T642	1		T738	1
values[48]	71	1			T422	4		T642	1		T738	1
values[49]	67	1			T422	3		T642	1		T738	1
values[50]	60	1			T422	2		T642	1		T738	1
values[51]	60	1			T422	1		T642	1		T738	1
values[52]	57	1			T422	2		T642	1		T738	1
values[53]	60	1			T422	1		T642	1		T738	1
values[54]	56	1			T422	2		T642	1		T738	1
values[55]	82	1			T422	2		T642	1		T738	1
values[56]	80	1			T422	2		T642	1		T738	1
values[57]	73	1			T422	2		T642	1		T738	1
values[58]	66	1			T422	3		T642	1		T738	1
values[59]	71	1			T422	2		T642	1		T738	1
values[60]	67	1			T422	2		T642	1		T738	2
values[61]	60	1			T422	2		T642	1		T738	1
values[62]	65	1			T422	2		T642	1		T738	1
values[63]	66	1			T422	2		T642	1		T738	1
values[64]	64	1			T422	3		T642	1		T738	1
values[65]	59	1			T422	2		T642	1		T738	1
values[66]	55	1			T422	4		T642	1		T738	1
values[67]	56	1			T422	4		T642	1		T738	1
values[68]	61	1			T422	1		T642	1		T738	1
values[69]	60	1			T422	3		T642	1		T738	1
values[70]	56	1			T422	2		T642	1		T738	1
values[71]	50	1			T422	1		T642	1		T738	1
values[72]	59	1			T422	2		T642	1		T738	1
values[73]	67	1			T422	1		T642	1		T738	1
values[74]	60	1			T422	4		T642	1		T738	1
values[75]	65	1			T422	4		T642	1		T738	1
values[76]	59	1			T422	1		T642	1		T738	1
values[77]	66	1			T422	1		T642	1		T738	1
values[78]	75	1			T422	5		T642	1		T738	1
values[79]	69	1			T422	1		T642	1		T738	1
values[80]	59	1			T422	1		T642	1		T738	1
values[81]	82	1			T422	1		T642	1		T738	1
values[82]	59	1			T422	1		T642	1		T738	1
values[83]	76	1			T422	7		T642	1		T738	1
values[84]	78	1			T422	13		T642	1		T738	1
values[85]	87	1			T422	7		T642	1		T738	1
values[86]	83	1			T422	11		T642	1		T738	1
values[87]	79	1			T422	8		T642	1		T738	1
values[88]	104	1			T422	4		T642	1		T738	1
values[89]	96	1			T422	4		T642	1		T738	1
values[90]	85	1			T422	9		T642	1		T738	1
values[91]	65	1			T422	4		T642	1		T738	1
values[92]	73	1			T422	3		T642	1		T738	1
values[93]	93	1			T422	10		T642	1		T738	1
values[94]	84	1			T422	5		T642	1		T738	1
values[95]	95	1			T422	5		T642	2		T738	1
values[96]	95	1			T422	7		T642	1		T738	1
values[97]	68	1			T422	2		T642	1		T738	1
values[98]	75	1			T422	1		T642	1		T738	1
values[99]	80	1			T422	1		T642	2		T738	2
values[100]	92	1			T422	5		T642	4		T738	1
values[101]	89	1			T422	1		T642	2		T738	1
values[102]	108	1			T422	4		T642	4		T738	1
values[103]	96	1			T422	1		T642	4		T738	1
values[104]	90	1			T422	2		T642	2		T738	1
values[105]	84	1			T422	3		T642	2		T738	1
values[106]	104	1			T422	3		T642	3		T738	1
values[107]	124	1			T422	5		T642	6		T738	1
values[108]	87	1			T422	1		T642	3		T738	1
values[109]	89	1			T422	3		T642	5		T738	1
values[110]	84	1			T422	4		T642	4		T738	1
values[111]	84	1			T422	8		T642	1		T738	1
values[112]	79	1			T422	3		T642	1		T738	1
values[113]	107	1			T422	2		T642	2		T738	1
values[114]	119	1			T422	5		T642	2		T738	1
values[115]	118	1			T422	7		T642	1		T738	1
values[116]	105	1			T422	3		T642	3		T738	1
values[117]	90	1			T422	1		T642	2		T738	1
values[118]	99	1			T422	9		T642	1		T738	1
values[119]	113	1			T422	7		T642	2		T738	2
values[120]	123	1			T422	8		T642	1		T738	4
values[121]	100	1			T422	3		T642	1		T738	4
values[122]	107	1			T422	6		T642	1		T738	1
values[123]	122	1			T422	4		T642	2		T738	1
values[124]	190	1			T422	13		T642	3		T738	1
values[125]	298	1			T422	30		T642	1		T738	5
values[126]	638	1			T422	58		T642	6		T738	11
values[127]	2719	1			T422	35		T642	94		T738	94
values[128]	4983	1			T422	1		T642	178		T738	247