Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwrmgr_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142294	1			T68	6		T69	15		T70	13
values[2]	9558	1			T69	1		T70	1		T75	119
values[3]	3835	1			T75	43		T503	1		T398	1
values[4]	2236	1			T75	26		T422	16		T748	8
values[5]	1459	1			T75	17		T422	10		T748	9
values[6]	1005	1			T75	10		T422	10		T748	10
values[7]	667	1			T75	10		T422	9		T748	7
values[8]	497	1			T75	3		T422	4		T748	5
values[9]	442	1			T422	2		T748	12		T751	6
values[10]	487	1			T422	9		T748	5		T751	2
values[11]	351	1			T422	3		T748	4		T751	5
values[12]	371	1			T422	2		T748	6		T751	3
values[13]	351	1			T422	3		T748	13		T751	5
values[14]	327	1			T422	6		T748	13		T751	5
values[15]	322	1			T422	7		T748	4		T751	11
values[16]	319	1			T422	9		T748	12		T751	9
values[17]	310	1			T422	4		T748	8		T751	2
values[18]	279	1			T422	2		T748	3		T751	3
values[19]	318	1			T422	5		T748	3		T751	3
values[20]	350	1			T422	5		T748	12		T751	7
values[21]	327	1			T422	3		T748	4		T751	9
values[22]	298	1			T422	6		T748	9		T751	11
values[23]	323	1			T422	4		T748	4		T751	12
values[24]	308	1			T422	3		T748	13		T751	7
values[25]	275	1			T422	2		T748	6		T751	6
values[26]	299	1			T422	4		T748	12		T751	4
values[27]	295	1			T422	2		T748	17		T751	3
values[28]	305	1			T422	6		T748	9		T751	7
values[29]	327	1			T422	5		T748	7		T751	5
values[30]	336	1			T422	8		T748	7		T751	4
values[31]	319	1			T422	9		T748	6		T751	7
values[32]	314	1			T422	8		T748	6		T751	9
values[33]	316	1			T422	6		T748	15		T751	13
values[34]	303	1			T422	19		T748	20		T751	16
values[35]	346	1			T422	19		T748	5		T751	14
values[36]	248	1			T422	4		T748	4		T751	12
values[37]	278	1			T422	3		T748	7		T751	3
values[38]	257	1			T422	6		T748	3		T751	2
values[39]	268	1			T422	2		T748	3		T751	5
values[40]	273	1			T422	3		T748	3		T751	7
values[41]	254	1			T422	3		T748	6		T751	13
values[42]	244	1			T422	1		T748	5		T751	17
values[43]	274	1			T422	4		T748	3		T751	12
values[44]	240	1			T422	3		T748	4		T751	2
values[45]	304	1			T422	5		T748	9		T751	8
values[46]	266	1			T422	7		T748	4		T751	6
values[47]	285	1			T422	11		T748	11		T751	6
values[48]	275	1			T422	5		T748	10		T751	10
values[49]	227	1			T422	3		T748	9		T751	7
values[50]	241	1			T422	3		T748	5		T751	4
values[51]	269	1			T422	3		T748	9		T751	6
values[52]	243	1			T422	4		T748	3		T751	13
values[53]	252	1			T422	5		T748	12		T751	6
values[54]	198	1			T422	2		T748	14		T751	7
values[55]	234	1			T422	4		T748	6		T751	3
values[56]	225	1			T422	7		T748	4		T751	6
values[57]	213	1			T422	2		T748	10		T751	7
values[58]	174	1			T422	2		T748	4		T751	5
values[59]	218	1			T422	4		T748	6		T751	8
values[60]	167	1			T422	6		T748	7		T751	3
values[61]	200	1			T422	2		T748	3		T751	5
values[62]	185	1			T422	2		T748	5		T751	3
values[63]	174	1			T422	3		T748	7		T751	8
values[64]	174	1			T422	5		T748	7		T751	10
values[65]	125	1			T422	2		T748	5		T751	5
values[66]	113	1			T422	2		T748	11		T751	5
values[67]	95	1			T422	6		T748	4		T751	6
values[68]	87	1			T422	4		T748	3		T751	4
values[69]	92	1			T422	2		T748	5		T751	6
values[70]	95	1			T422	3		T751	7		T642	1
values[71]	94	1			T422	4		T751	5		T642	1
values[72]	82	1			T422	9		T751	12		T642	1
values[73]	88	1			T422	27		T751	7		T642	1
values[74]	87	1			T422	17		T751	13		T642	1
values[75]	87	1			T422	8		T751	8		T642	1
values[76]	81	1			T422	5		T751	6		T642	1
values[77]	114	1			T422	7		T751	6		T642	1
values[78]	91	1			T422	5		T751	10		T642	1
values[79]	77	1			T422	7		T751	7		T642	1
values[80]	89	1			T422	21		T751	10		T642	1
values[81]	52	1			T422	7		T751	3		T642	1
values[82]	82	1			T422	14		T751	3		T642	1
values[83]	58	1			T422	4		T751	5		T642	1
values[84]	62	1			T422	2		T751	5		T642	1
values[85]	73	1			T422	1		T751	4		T642	3
values[86]	91	1			T751	3		T642	8		T553	9
values[87]	87	1			T751	7		T642	5		T553	6
values[88]	66	1			T751	15		T642	2		T553	3
values[89]	79	1			T751	20		T642	1		T553	4
values[90]	91	1			T751	17		T642	3		T553	8
values[91]	87	1			T751	16		T642	2		T553	2
values[92]	84	1			T751	3		T642	2		T553	5
values[93]	96	1			T751	9		T642	1		T553	1
values[94]	84	1			T751	12		T642	1		T553	1
values[95]	71	1			T751	9		T642	4		T553	2
values[96]	76	1			T751	17		T642	4		T553	4
values[97]	74	1			T751	14		T642	1		T553	2
values[98]	55	1			T751	8		T642	1		T553	1
values[99]	66	1			T751	3		T642	1		T553	4
values[100]	78	1			T751	12		T642	1		T553	4
values[101]	77	1			T751	16		T642	1		T553	2
values[102]	86	1			T751	7		T642	3		T553	1
values[103]	74	1			T751	11		T642	1		T553	2
values[104]	85	1			T751	8		T642	3		T553	2
values[105]	93	1			T751	11		T642	1		T553	10
values[106]	58	1			T751	3		T642	1		T553	3
values[107]	65	1			T751	10		T642	1		T553	2
values[108]	55	1			T751	10		T642	5		T553	1
values[109]	77	1			T751	8		T642	3		T553	2
values[110]	78	1			T751	14		T642	1		T553	4
values[111]	65	1			T751	11		T642	1		T553	4
values[112]	50	1			T751	10		T642	1		T553	2
values[113]	69	1			T751	12		T642	4		T553	2
values[114]	63	1			T751	11		T642	3		T553	2
values[115]	53	1			T751	4		T642	5		T553	5
values[116]	54	1			T751	1		T642	2		T553	14
values[117]	62	1			T751	2		T642	4		T553	6
values[118]	57	1			T751	4		T642	4		T553	4
values[119]	56	1			T751	1		T642	5		T553	8
values[120]	73	1			T751	2		T642	5		T553	10
values[121]	60	1			T751	4		T642	1		T553	8
values[122]	56	1			T751	5		T642	4		T553	4
values[123]	46	1			T751	2		T642	2		T553	2
values[124]	57	1			T751	4		T642	1		T553	6
values[125]	68	1			T751	7		T642	3		T553	9
values[126]	144	1			T751	26		T642	2		T553	43
values[127]	678	1			T751	34		T642	21		T553	89
values[128]	5325	1			T751	15		T642	282		T553	37