Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	151325	1			T68	6		T69	19		T70	15
values[2]	12342	1			T412	1		T503	7		T427	2
values[3]	6314	1			T503	1		T756	53		T609	87
values[4]	3597	1			T756	20		T609	54		T434	25
values[5]	1614	1			T756	21		T609	7		T434	7
values[6]	975	1			T756	1		T769	52		T642	1
values[7]	559	1			T769	23		T642	1		T420	1
values[8]	430	1			T769	15		T642	1		T420	1
values[9]	370	1			T769	17		T642	1		T420	1
values[10]	306	1			T769	11		T642	1		T420	1
values[11]	263	1			T769	9		T642	1		T420	1
values[12]	219	1			T769	5		T642	1		T420	1
values[13]	201	1			T769	8		T642	1		T420	1
values[14]	233	1			T769	2		T642	1		T420	1
values[15]	164	1			T642	1		T420	1		T424	2
values[16]	168	1			T642	1		T420	1		T424	2
values[17]	244	1			T642	1		T420	1		T424	2
values[18]	265	1			T642	1		T420	1		T424	2
values[19]	258	1			T642	1		T420	1		T424	2
values[20]	197	1			T642	1		T420	1		T424	2
values[21]	199	1			T642	1		T420	1		T424	2
values[22]	197	1			T642	1		T420	1		T424	2
values[23]	197	1			T642	1		T420	2		T424	2
values[24]	179	1			T642	1		T420	1		T424	2
values[25]	202	1			T642	1		T420	1		T424	2
values[26]	158	1			T642	1		T420	1		T424	2
values[27]	207	1			T642	1		T420	1		T424	2
values[28]	204	1			T642	1		T420	1		T424	2
values[29]	209	1			T642	1		T420	1		T424	2
values[30]	290	1			T642	1		T420	1		T424	2
values[31]	267	1			T642	1		T420	1		T424	2
values[32]	238	1			T642	1		T420	1		T424	2
values[33]	223	1			T642	1		T420	1		T424	2
values[34]	187	1			T642	1		T420	1		T424	2
values[35]	205	1			T642	1		T420	1		T424	2
values[36]	253	1			T642	1		T420	1		T424	3
values[37]	228	1			T642	1		T420	1		T424	2
values[38]	237	1			T642	1		T420	1		T424	2
values[39]	190	1			T642	1		T420	1		T424	2
values[40]	156	1			T642	1		T420	1		T424	2
values[41]	192	1			T642	1		T420	1		T424	2
values[42]	227	1			T642	1		T420	1		T424	2
values[43]	174	1			T642	1		T420	1		T424	2
values[44]	152	1			T642	1		T420	1		T424	2
values[45]	158	1			T642	1		T420	1		T424	2
values[46]	166	1			T642	1		T420	1		T424	2
values[47]	134	1			T642	1		T420	1		T424	2
values[48]	167	1			T642	1		T420	1		T424	2
values[49]	148	1			T642	1		T420	1		T424	2
values[50]	138	1			T642	1		T420	1		T424	2
values[51]	124	1			T642	1		T420	1		T424	3
values[52]	87	1			T642	1		T420	1		T424	2
values[53]	108	1			T642	1		T420	1		T424	3
values[54]	78	1			T642	1		T420	1		T424	3
values[55]	61	1			T642	1		T420	1		T424	2
values[56]	58	1			T642	1		T420	1		T424	2
values[57]	57	1			T642	1		T420	1		T424	2
values[58]	59	1			T642	1		T420	1		T424	2
values[59]	50	1			T642	1		T420	1		T424	2
values[60]	80	1			T642	1		T420	1		T424	2
values[61]	66	1			T642	1		T420	1		T424	2
values[62]	62	1			T642	1		T420	1		T424	2
values[63]	73	1			T642	1		T420	1		T424	2
values[64]	54	1			T642	1		T420	1		T424	2
values[65]	46	1			T642	1		T420	1		T424	2
values[66]	58	1			T642	1		T420	1		T424	2
values[67]	67	1			T642	1		T420	1		T424	2
values[68]	57	1			T642	1		T420	1		T424	2
values[69]	74	1			T642	1		T420	1		T424	2
values[70]	69	1			T642	1		T420	1		T424	2
values[71]	52	1			T642	1		T420	1		T424	2
values[72]	47	1			T642	1		T420	1		T424	2
values[73]	42	1			T642	1		T420	1		T424	2
values[74]	53	1			T642	1		T420	1		T424	2
values[75]	65	1			T642	1		T420	1		T424	2
values[76]	92	1			T642	1		T420	1		T424	2
values[77]	67	1			T642	1		T420	1		T424	2
values[78]	47	1			T642	1		T420	1		T424	2
values[79]	39	1			T642	1		T420	1		T424	2
values[80]	41	1			T642	1		T420	1		T424	2
values[81]	53	1			T642	1		T420	1		T424	2
values[82]	44	1			T642	1		T420	1		T424	2
values[83]	58	1			T642	1		T420	1		T424	2
values[84]	50	1			T642	1		T420	1		T424	2
values[85]	49	1			T642	1		T420	1		T424	2
values[86]	54	1			T642	1		T420	1		T424	2
values[87]	43	1			T642	1		T420	1		T424	3
values[88]	40	1			T642	1		T420	1		T424	2
values[89]	32	1			T642	1		T420	1		T424	2
values[90]	41	1			T642	4		T420	1		T424	2
values[91]	40	1			T642	2		T420	1		T424	2
values[92]	38	1			T642	1		T420	1		T424	2
values[93]	39	1			T642	3		T420	1		T424	2
values[94]	48	1			T642	1		T420	2		T424	2
values[95]	37	1			T642	1		T420	1		T424	2
values[96]	42	1			T642	1		T420	1		T424	2
values[97]	44	1			T642	3		T420	1		T424	2
values[98]	40	1			T642	4		T420	1		T424	2
values[99]	37	1			T642	1		T420	1		T424	2
values[100]	42	1			T642	5		T420	2		T424	2
values[101]	39	1			T642	2		T420	5		T424	2
values[102]	34	1			T642	1		T420	2		T424	2
values[103]	48	1			T642	2		T420	3		T424	2
values[104]	46	1			T642	7		T420	1		T424	2
values[105]	39	1			T642	2		T420	2		T424	2
values[106]	44	1			T642	3		T420	8		T424	3
values[107]	39	1			T642	3		T420	1		T424	2
values[108]	46	1			T642	2		T420	1		T424	2
values[109]	48	1			T642	2		T420	2		T424	2
values[110]	55	1			T642	3		T420	1		T424	2
values[111]	52	1			T642	2		T420	2		T424	2
values[112]	49	1			T642	4		T420	1		T424	2
values[113]	41	1			T642	2		T420	1		T424	2
values[114]	41	1			T642	3		T420	2		T424	2
values[115]	45	1			T642	4		T420	3		T424	2
values[116]	46	1			T642	1		T420	2		T424	3
values[117]	34	1			T642	1		T420	1		T424	3
values[118]	36	1			T642	2		T420	3		T424	2
values[119]	44	1			T642	3		T420	4		T424	3
values[120]	41	1			T642	1		T420	2		T424	2
values[121]	40	1			T642	1		T420	2		T424	2
values[122]	43	1			T642	1		T420	3		T424	4
values[123]	50	1			T642	1		T420	2		T424	7
values[124]	42	1			T642	1		T420	1		T424	5
values[125]	51	1			T642	2		T420	5		T424	2
values[126]	364	1			T642	17		T420	10		T424	42
values[127]	2622	1			T642	107		T420	130		T424	243
values[128]	4885	1			T642	219		T420	199		T424	370