Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	149085	1			T63	4		T64	92		T70	7
values[2]	4415	1			T113	5		T399	33		T479	4
values[3]	2194	1			T399	6		T479	1		T477	23
values[4]	1676	1			T399	10		T477	15		T830	6
values[5]	1198	1			T399	20		T477	14		T830	6
values[6]	934	1			T399	10		T477	4		T830	23
values[7]	730	1			T399	2		T830	21		T850	1
values[8]	622	1			T399	3		T830	45		T850	1
values[9]	703	1			T399	7		T830	63		T850	1
values[10]	604	1			T399	7		T830	55		T850	1
values[11]	577	1			T399	5		T830	32		T850	1
values[12]	497	1			T399	6		T830	31		T850	1
values[13]	437	1			T399	6		T830	21		T850	1
values[14]	441	1			T399	4		T830	14		T850	1
values[15]	419	1			T399	1		T830	16		T850	1
values[16]	388	1			T399	3		T830	21		T850	1
values[17]	380	1			T399	4		T830	33		T850	1
values[18]	337	1			T399	2		T830	36		T850	1
values[19]	335	1			T830	39		T850	1		T840	5
values[20]	269	1			T830	15		T850	1		T840	8
values[21]	293	1			T830	7		T850	1		T840	29
values[22]	366	1			T850	1		T840	51		T855	1
values[23]	324	1			T850	1		T840	39		T855	1
values[24]	273	1			T850	1		T840	16		T855	1
values[25]	180	1			T850	1		T840	5		T855	1
values[26]	175	1			T850	1		T840	1		T855	1
values[27]	188	1			T850	1		T840	13		T855	1
values[28]	205	1			T850	1		T840	22		T855	1
values[29]	157	1			T850	1		T840	13		T855	1
values[30]	149	1			T850	1		T840	5		T855	1
values[31]	170	1			T850	1		T840	2		T855	1
values[32]	154	1			T850	1		T855	1		T418	6
values[33]	159	1			T850	1		T855	2		T418	4
values[34]	122	1			T850	1		T855	1		T597	1
values[35]	115	1			T850	1		T855	1		T597	1
values[36]	104	1			T850	1		T855	1		T597	1
values[37]	103	1			T850	1		T855	1		T597	1
values[38]	82	1			T850	1		T855	1		T597	2
values[39]	68	1			T850	1		T855	1		T597	1
values[40]	75	1			T850	1		T855	1		T597	1
values[41]	102	1			T850	1		T855	1		T597	1
values[42]	100	1			T850	1		T855	1		T597	1
values[43]	81	1			T850	1		T855	1		T597	1
values[44]	76	1			T850	1		T855	1		T597	1
values[45]	56	1			T850	1		T855	1		T597	1
values[46]	52	1			T850	1		T855	1		T597	1
values[47]	63	1			T850	1		T855	1		T597	2
values[48]	70	1			T850	1		T855	1		T597	1
values[49]	72	1			T850	1		T855	1		T597	1
values[50]	61	1			T850	1		T855	1		T597	1
values[51]	67	1			T850	1		T855	1		T597	1
values[52]	48	1			T850	1		T855	1		T597	1
values[53]	49	1			T850	1		T855	1		T597	1
values[54]	60	1			T850	1		T855	1		T597	1
values[55]	53	1			T850	1		T855	1		T597	1
values[56]	51	1			T850	1		T855	1		T597	1
values[57]	63	1			T850	1		T855	1		T597	1
values[58]	58	1			T850	1		T855	1		T597	1
values[59]	63	1			T850	1		T855	1		T597	1
values[60]	57	1			T850	1		T855	1		T597	1
values[61]	57	1			T850	1		T855	1		T597	1
values[62]	61	1			T850	1		T855	1		T597	1
values[63]	57	1			T850	1		T855	1		T597	1
values[64]	64	1			T850	1		T855	1		T597	1
values[65]	58	1			T850	1		T855	1		T597	1
values[66]	61	1			T850	1		T855	1		T597	1
values[67]	57	1			T850	1		T855	1		T597	1
values[68]	64	1			T850	1		T855	1		T597	1
values[69]	60	1			T850	1		T855	1		T597	1
values[70]	55	1			T850	1		T855	1		T597	1
values[71]	60	1			T850	1		T855	1		T597	1
values[72]	76	1			T850	1		T855	1		T597	1
values[73]	76	1			T850	1		T855	1		T597	1
values[74]	74	1			T850	1		T855	1		T597	1
values[75]	67	1			T850	1		T855	1		T597	1
values[76]	74	1			T850	1		T855	1		T597	1
values[77]	69	1			T850	1		T855	1		T597	1
values[78]	73	1			T850	1		T855	1		T597	1
values[79]	73	1			T850	1		T855	1		T597	1
values[80]	76	1			T850	1		T855	1		T597	1
values[81]	72	1			T850	1		T855	1		T597	1
values[82]	75	1			T850	1		T855	1		T597	1
values[83]	85	1			T850	1		T855	1		T597	1
values[84]	64	1			T850	1		T855	1		T597	1
values[85]	78	1			T850	1		T855	1		T597	1
values[86]	75	1			T850	1		T855	1		T597	1
values[87]	73	1			T850	1		T855	2		T597	1
values[88]	78	1			T850	1		T855	2		T597	1
values[89]	107	1			T850	2		T855	1		T597	1
values[90]	104	1			T850	5		T855	1		T597	1
values[91]	104	1			T850	1		T855	2		T597	1
values[92]	96	1			T850	4		T855	5		T597	1
values[93]	94	1			T850	6		T855	3		T597	1
values[94]	77	1			T850	1		T855	4		T597	1
values[95]	81	1			T850	1		T855	6		T597	1
values[96]	93	1			T850	2		T855	6		T597	1
values[97]	94	1			T850	3		T855	3		T597	1
values[98]	105	1			T850	3		T855	2		T597	1
values[99]	113	1			T850	2		T855	2		T597	1
values[100]	86	1			T850	1		T855	3		T597	1
values[101]	92	1			T850	4		T855	1		T597	1
values[102]	78	1			T850	3		T855	2		T597	1
values[103]	96	1			T850	4		T855	1		T597	1
values[104]	103	1			T850	1		T855	4		T597	1
values[105]	91	1			T850	1		T855	3		T597	2
values[106]	94	1			T850	7		T855	1		T597	1
values[107]	106	1			T850	10		T855	1		T597	1
values[108]	83	1			T850	1		T855	1		T597	1
values[109]	88	1			T850	2		T855	2		T597	1
values[110]	109	1			T850	1		T855	2		T597	1
values[111]	95	1			T850	1		T855	2		T597	1
values[112]	95	1			T850	1		T855	3		T597	1
values[113]	108	1			T850	2		T855	2		T597	1
values[114]	123	1			T850	4		T855	2		T597	1
values[115]	127	1			T850	3		T855	2		T597	1
values[116]	144	1			T850	5		T855	2		T597	1
values[117]	132	1			T850	4		T855	2		T597	1
values[118]	122	1			T850	2		T855	3		T597	1
values[119]	117	1			T850	2		T855	2		T597	2
values[120]	132	1			T850	3		T855	1		T597	2
values[121]	137	1			T850	3		T855	1		T597	5
values[122]	112	1			T850	1		T855	3		T597	1
values[123]	117	1			T850	2		T855	5		T597	2
values[124]	209	1			T850	1		T855	3		T597	2
values[125]	321	1			T850	2		T855	3		T597	2
values[126]	589	1			T850	11		T855	7		T597	11
values[127]	2188	1			T850	81		T855	85		T597	103
values[128]	4387	1			T850	211		T855	191		T597	237