Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	150663	1			T63	5		T64	95		T70	7
values[2]	4473	1			T113	1		T399	4		T746	1
values[3]	2269	1			T746	1		T397	170		T850	1
values[4]	1903	1			T746	1		T397	144		T850	1
values[5]	1564	1			T746	1		T397	70		T850	2
values[6]	1246	1			T746	1		T397	33		T850	1
values[7]	1077	1			T746	1		T397	8		T850	1
values[8]	834	1			T746	1		T397	1		T850	1
values[9]	806	1			T746	1		T397	3		T850	1
values[10]	779	1			T746	1		T397	3		T850	1
values[11]	697	1			T746	1		T397	9		T850	1
values[12]	580	1			T746	1		T397	14		T850	1
values[13]	550	1			T746	1		T397	8		T850	1
values[14]	502	1			T746	1		T397	23		T850	1
values[15]	442	1			T746	1		T397	29		T850	1
values[16]	354	1			T746	1		T397	15		T850	1
values[17]	340	1			T746	1		T397	5		T850	1
values[18]	352	1			T746	1		T397	2		T850	1
values[19]	302	1			T746	1		T850	1		T849	1
values[20]	241	1			T746	1		T850	1		T849	1
values[21]	277	1			T746	1		T850	1		T849	1
values[22]	221	1			T746	1		T850	1		T849	1
values[23]	194	1			T746	1		T850	1		T849	1
values[24]	185	1			T746	1		T850	1		T849	1
values[25]	263	1			T746	1		T850	1		T849	1
values[26]	262	1			T746	1		T850	1		T849	1
values[27]	244	1			T746	1		T850	1		T849	1
values[28]	222	1			T746	1		T850	1		T849	1
values[29]	193	1			T746	1		T850	1		T849	1
values[30]	167	1			T746	1		T850	1		T849	1
values[31]	166	1			T746	1		T850	1		T849	1
values[32]	143	1			T746	1		T850	1		T849	1
values[33]	108	1			T746	1		T850	1		T849	1
values[34]	132	1			T746	1		T850	1		T849	1
values[35]	149	1			T746	1		T850	1		T849	1
values[36]	149	1			T746	1		T850	1		T849	1
values[37]	111	1			T746	1		T850	1		T849	1
values[38]	96	1			T746	1		T850	1		T849	1
values[39]	100	1			T746	1		T850	1		T849	1
values[40]	90	1			T746	1		T850	1		T849	1
values[41]	83	1			T746	1		T850	1		T849	1
values[42]	99	1			T746	1		T850	1		T849	1
values[43]	93	1			T746	1		T850	1		T849	1
values[44]	77	1			T746	1		T850	1		T849	1
values[45]	82	1			T746	1		T850	1		T849	1
values[46]	70	1			T746	1		T850	1		T849	1
values[47]	75	1			T746	1		T850	1		T849	1
values[48]	86	1			T746	1		T850	1		T849	1
values[49]	86	1			T746	1		T850	1		T849	1
values[50]	83	1			T746	1		T850	1		T849	1
values[51]	69	1			T746	1		T850	1		T849	1
values[52]	46	1			T746	1		T850	1		T849	1
values[53]	47	1			T746	1		T850	1		T849	1
values[54]	44	1			T746	1		T850	1		T849	1
values[55]	55	1			T746	1		T850	1		T849	1
values[56]	44	1			T746	1		T850	1		T849	1
values[57]	55	1			T746	1		T850	1		T849	1
values[58]	55	1			T746	1		T850	1		T849	1
values[59]	58	1			T746	1		T850	1		T849	1
values[60]	51	1			T746	1		T850	1		T849	1
values[61]	46	1			T746	1		T850	1		T849	1
values[62]	48	1			T746	1		T850	1		T849	1
values[63]	50	1			T746	1		T850	1		T849	1
values[64]	43	1			T746	1		T850	1		T849	1
values[65]	45	1			T746	1		T850	1		T849	1
values[66]	45	1			T746	1		T850	1		T849	1
values[67]	42	1			T746	1		T850	1		T849	1
values[68]	46	1			T746	1		T850	1		T849	1
values[69]	56	1			T746	1		T850	1		T849	1
values[70]	46	1			T746	1		T850	1		T849	1
values[71]	51	1			T746	1		T850	1		T849	1
values[72]	59	1			T746	1		T850	1		T849	1
values[73]	54	1			T746	1		T850	1		T849	1
values[74]	47	1			T746	1		T850	1		T849	1
values[75]	60	1			T746	1		T850	1		T849	1
values[76]	47	1			T746	1		T850	1		T849	1
values[77]	56	1			T746	1		T850	1		T849	1
values[78]	68	1			T746	1		T850	1		T849	1
values[79]	93	1			T746	1		T850	1		T849	1
values[80]	70	1			T746	1		T850	1		T849	1
values[81]	54	1			T746	1		T850	1		T849	1
values[82]	58	1			T746	1		T850	1		T849	1
values[83]	76	1			T746	1		T850	1		T849	1
values[84]	73	1			T746	1		T850	1		T849	1
values[85]	73	1			T746	1		T850	1		T849	1
values[86]	63	1			T746	1		T850	1		T849	1
values[87]	58	1			T746	1		T850	1		T849	1
values[88]	60	1			T746	1		T850	1		T849	1
values[89]	68	1			T746	1		T850	1		T849	1
values[90]	66	1			T746	1		T850	1		T849	1
values[91]	63	1			T746	1		T850	1		T849	1
values[92]	77	1			T746	1		T850	1		T849	1
values[93]	74	1			T746	1		T850	1		T849	1
values[94]	69	1			T746	1		T850	1		T849	3
values[95]	89	1			T746	1		T850	1		T849	8
values[96]	80	1			T746	1		T850	1		T849	2
values[97]	90	1			T746	1		T850	1		T849	1
values[98]	88	1			T746	1		T850	1		T849	2
values[99]	71	1			T746	1		T850	1		T849	1
values[100]	81	1			T746	1		T850	1		T849	3
values[101]	73	1			T746	1		T850	1		T849	3
values[102]	65	1			T746	1		T850	1		T849	2
values[103]	73	1			T746	1		T850	1		T849	3
values[104]	75	1			T746	1		T850	1		T849	1
values[105]	74	1			T746	1		T850	1		T849	1
values[106]	81	1			T746	1		T850	1		T849	1
values[107]	68	1			T746	1		T850	1		T849	2
values[108]	82	1			T746	1		T850	1		T849	1
values[109]	79	1			T746	1		T850	1		T849	2
values[110]	67	1			T746	1		T850	1		T849	1
values[111]	86	1			T746	1		T850	1		T849	2
values[112]	77	1			T746	1		T850	1		T849	4
values[113]	96	1			T746	1		T850	1		T849	1
values[114]	80	1			T746	1		T850	2		T849	2
values[115]	99	1			T746	1		T850	1		T849	1
values[116]	93	1			T746	1		T850	1		T849	1
values[117]	111	1			T746	2		T850	1		T849	1
values[118]	90	1			T746	4		T850	2		T849	1
values[119]	109	1			T746	1		T850	3		T849	4
values[120]	109	1			T746	1		T850	1		T849	2
values[121]	99	1			T746	2		T850	1		T849	2
values[122]	90	1			T746	3		T850	1		T849	4
values[123]	117	1			T746	1		T850	2		T849	4
values[124]	166	1			T746	1		T850	3		T849	2
values[125]	243	1			T746	3		T850	1		T849	3
values[126]	648	1			T746	20		T850	12		T849	13
values[127]	3120	1			T746	128		T850	103		T849	123
values[128]	5753	1			T746	231		T850	194		T849	244