Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	154385	1			T63	5		T64	123		T70	11
values[2]	5021	1			T63	1		T479	2		T475	3
values[3]	2438	1			T397	2		T850	1		T463	1
values[4]	1731	1			T397	2		T850	1		T416	2
values[5]	1287	1			T397	4		T850	1		T416	3
values[6]	1172	1			T397	5		T850	1		T416	4
values[7]	990	1			T397	1		T850	1		T416	2
values[8]	842	1			T397	2		T850	1		T416	1
values[9]	797	1			T397	2		T850	1		T416	1
values[10]	729	1			T397	1		T850	1		T416	2
values[11]	618	1			T397	1		T850	1		T416	3
values[12]	562	1			T397	2		T850	1		T416	1
values[13]	485	1			T397	2		T850	1		T416	3
values[14]	381	1			T397	2		T850	1		T416	1
values[15]	318	1			T397	1		T850	1		T416	1
values[16]	349	1			T397	2		T850	1		T416	2
values[17]	327	1			T397	2		T850	1		T416	4
values[18]	293	1			T397	1		T850	1		T416	4
values[19]	270	1			T397	3		T850	1		T416	2
values[20]	263	1			T397	1		T850	1		T416	1
values[21]	190	1			T397	1		T850	1		T416	1
values[22]	172	1			T397	3		T850	1		T416	3
values[23]	156	1			T397	1		T850	1		T416	4
values[24]	139	1			T397	1		T850	1		T416	5
values[25]	115	1			T397	2		T850	1		T416	11
values[26]	88	1			T397	2		T850	1		T416	1
values[27]	135	1			T397	2		T850	1		T416	3
values[28]	172	1			T397	1		T850	1		T416	3
values[29]	154	1			T397	2		T850	1		T416	1
values[30]	123	1			T397	2		T850	1		T416	1
values[31]	128	1			T397	3		T850	1		T416	2
values[32]	98	1			T397	1		T850	1		T416	4
values[33]	89	1			T397	5		T850	1		T416	1
values[34]	74	1			T397	1		T850	1		T416	3
values[35]	64	1			T397	1		T850	1		T416	1
values[36]	66	1			T397	3		T850	1		T416	1
values[37]	71	1			T397	1		T850	1		T416	4
values[38]	62	1			T397	2		T850	1		T416	2
values[39]	68	1			T397	8		T850	1		T416	7
values[40]	75	1			T397	1		T850	1		T416	3
values[41]	65	1			T397	1		T850	1		T416	4
values[42]	73	1			T397	3		T850	1		T416	2
values[43]	73	1			T397	2		T850	1		T416	3
values[44]	77	1			T397	2		T850	1		T416	2
values[45]	68	1			T397	2		T850	1		T416	4
values[46]	69	1			T397	1		T850	1		T416	3
values[47]	64	1			T397	2		T850	1		T416	3
values[48]	72	1			T397	5		T850	1		T416	3
values[49]	65	1			T397	4		T850	1		T416	6
values[50]	70	1			T397	2		T850	1		T416	8
values[51]	71	1			T397	3		T850	1		T416	1
values[52]	66	1			T397	2		T850	1		T416	1
values[53]	77	1			T397	5		T850	1		T416	3
values[54]	70	1			T397	3		T850	1		T416	1
values[55]	75	1			T397	2		T850	1		T416	2
values[56]	57	1			T397	1		T850	1		T416	2
values[57]	60	1			T397	1		T850	1		T416	4
values[58]	63	1			T397	6		T850	1		T416	1
values[59]	68	1			T397	3		T850	1		T416	2
values[60]	67	1			T397	1		T850	1		T416	1
values[61]	77	1			T397	2		T850	1		T416	5
values[62]	73	1			T397	4		T850	1		T416	2
values[63]	63	1			T397	3		T850	1		T416	4
values[64]	63	1			T397	1		T850	1		T416	2
values[65]	63	1			T397	3		T850	1		T416	2
values[66]	67	1			T397	6		T850	1		T416	2
values[67]	71	1			T397	3		T850	1		T416	2
values[68]	62	1			T397	2		T850	1		T416	1
values[69]	70	1			T397	2		T850	1		T416	2
values[70]	66	1			T397	2		T850	1		T416	2
values[71]	71	1			T397	2		T850	1		T416	2
values[72]	77	1			T397	1		T850	1		T416	5
values[73]	77	1			T397	4		T850	1		T416	4
values[74]	67	1			T397	2		T850	1		T416	2
values[75]	61	1			T397	1		T850	1		T416	2
values[76]	82	1			T397	2		T850	1		T416	6
values[77]	73	1			T397	3		T850	1		T416	5
values[78]	59	1			T397	2		T850	1		T416	1
values[79]	87	1			T397	3		T850	1		T416	3
values[80]	81	1			T397	1		T850	1		T416	3
values[81]	89	1			T397	2		T850	2		T416	3
values[82]	88	1			T397	2		T850	1		T416	1
values[83]	73	1			T397	1		T850	1		T416	3
values[84]	65	1			T397	2		T850	1		T416	1
values[85]	86	1			T397	2		T850	1		T416	5
values[86]	73	1			T397	3		T850	1		T416	3
values[87]	78	1			T397	2		T850	1		T416	5
values[88]	76	1			T397	2		T850	2		T416	3
values[89]	103	1			T397	3		T850	2		T416	2
values[90]	103	1			T397	3		T850	4		T416	3
values[91]	93	1			T397	2		T850	1		T416	1
values[92]	108	1			T397	4		T850	3		T416	2
values[93]	108	1			T397	2		T850	7		T416	3
values[94]	91	1			T397	1		T850	3		T416	1
values[95]	88	1			T397	2		T850	3		T416	1
values[96]	91	1			T397	5		T850	2		T416	5
values[97]	92	1			T397	1		T850	4		T416	2
values[98]	109	1			T397	1		T850	1		T416	5
values[99]	120	1			T397	2		T850	3		T416	6
values[100]	107	1			T397	5		T850	2		T416	4
values[101]	103	1			T397	7		T850	3		T416	1
values[102]	98	1			T397	4		T850	1		T416	6
values[103]	104	1			T397	1		T850	2		T416	5
values[104]	86	1			T397	2		T850	3		T416	3
values[105]	93	1			T397	3		T850	1		T416	2
values[106]	106	1			T397	1		T850	2		T416	6
values[107]	139	1			T397	4		T850	2		T416	5
values[108]	121	1			T397	2		T850	3		T416	6
values[109]	113	1			T397	5		T850	2		T416	2
values[110]	111	1			T397	3		T850	1		T416	2
values[111]	127	1			T397	4		T850	2		T416	6
values[112]	120	1			T397	2		T850	3		T416	3
values[113]	143	1			T397	3		T850	4		T416	5
values[114]	129	1			T397	4		T850	2		T416	4
values[115]	109	1			T397	3		T850	5		T416	8
values[116]	110	1			T397	4		T850	1		T416	10
values[117]	118	1			T397	2		T850	3		T416	4
values[118]	157	1			T397	2		T850	4		T416	8
values[119]	139	1			T397	2		T850	1		T416	5
values[120]	145	1			T397	5		T850	2		T416	16
values[121]	125	1			T397	5		T850	2		T416	4
values[122]	154	1			T397	5		T850	3		T416	3
values[123]	160	1			T397	6		T850	2		T416	2
values[124]	286	1			T397	38		T850	2		T416	16
values[125]	618	1			T397	74		T850	5		T416	34
values[126]	1082	1			T397	85		T850	7		T416	73
values[127]	3154	1			T397	57		T850	105		T416	37
values[128]	5358	1			T397	5		T850	216		T416	1