Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	160326	1			T62	66		T63	13		T64	17
values[2]	4342	1			T63	2		T241	1		T485	1
values[3]	1797	1			T388	1		T554	1		T721	3
values[4]	1327	1			T554	1		T514	1		T726	1
values[5]	1030	1			T726	2		T405	19		T727	2
values[6]	855	1			T726	4		T405	14		T727	2
values[7]	764	1			T726	15		T405	7		T727	2
values[8]	688	1			T726	12		T405	4		T727	4
values[9]	545	1			T726	4		T405	4		T727	3
values[10]	460	1			T726	2		T405	1		T727	2
values[11]	527	1			T726	5		T405	1		T727	2
values[12]	420	1			T726	4		T405	1		T727	2
values[13]	397	1			T726	5		T405	2		T727	3
values[14]	364	1			T726	4		T405	3		T727	2
values[15]	321	1			T726	2		T405	2		T727	2
values[16]	278	1			T726	3		T405	1		T727	1
values[17]	324	1			T726	5		T405	1		T727	3
values[18]	303	1			T726	9		T405	7		T727	6
values[19]	270	1			T726	20		T405	2		T727	3
values[20]	301	1			T726	10		T405	2		T727	2
values[21]	320	1			T726	5		T405	4		T727	4
values[22]	255	1			T726	2		T405	5		T727	3
values[23]	231	1			T726	5		T405	2		T727	2
values[24]	177	1			T726	6		T405	4		T727	1
values[25]	153	1			T726	3		T405	3		T727	3
values[26]	160	1			T726	1		T405	5		T727	3
values[27]	123	1			T405	3		T727	3		T742	1
values[28]	129	1			T405	2		T727	1		T742	1
values[29]	173	1			T405	1		T727	3		T742	1
values[30]	176	1			T405	3		T727	6		T742	1
values[31]	176	1			T405	2		T727	6		T742	1
values[32]	122	1			T405	3		T727	4		T742	1
values[33]	125	1			T405	3		T727	4		T742	1
values[34]	125	1			T405	2		T727	3		T742	1
values[35]	131	1			T405	1		T727	3		T742	1
values[36]	142	1			T405	7		T727	7		T742	1
values[37]	139	1			T405	3		T727	4		T742	1
values[38]	77	1			T405	3		T727	3		T742	1
values[39]	60	1			T405	3		T727	1		T742	1
values[40]	66	1			T405	2		T727	5		T742	1
values[41]	64	1			T405	1		T727	7		T742	1
values[42]	48	1			T405	1		T727	5		T742	1
values[43]	46	1			T405	1		T727	4		T742	1
values[44]	37	1			T405	2		T727	2		T742	1
values[45]	40	1			T405	3		T727	1		T742	1
values[46]	42	1			T405	2		T727	2		T742	1
values[47]	42	1			T405	2		T727	1		T742	1
values[48]	41	1			T405	2		T727	2		T742	1
values[49]	47	1			T405	1		T727	5		T742	1
values[50]	39	1			T405	1		T727	2		T742	1
values[51]	44	1			T405	6		T727	2		T742	1
values[52]	42	1			T405	8		T727	2		T742	1
values[53]	39	1			T405	2		T727	4		T742	1
values[54]	46	1			T405	2		T727	5		T742	1
values[55]	42	1			T405	1		T727	3		T742	1
values[56]	45	1			T405	2		T727	2		T742	1
values[57]	48	1			T405	4		T727	1		T742	1
values[58]	40	1			T405	3		T727	7		T742	1
values[59]	39	1			T405	1		T727	4		T742	1
values[60]	39	1			T405	1		T727	2		T742	1
values[61]	42	1			T405	4		T727	2		T742	1
values[62]	42	1			T405	1		T727	2		T742	1
values[63]	39	1			T405	2		T727	2		T742	1
values[64]	41	1			T405	1		T727	3		T742	1
values[65]	31	1			T405	1		T727	1		T742	1
values[66]	42	1			T405	1		T727	4		T742	2
values[67]	51	1			T405	4		T727	7		T742	1
values[68]	42	1			T405	3		T727	2		T742	1
values[69]	38	1			T405	2		T727	2		T742	1
values[70]	40	1			T405	5		T727	3		T742	1
values[71]	43	1			T405	10		T727	2		T742	1
values[72]	44	1			T405	6		T727	2		T742	1
values[73]	34	1			T405	2		T727	2		T742	1
values[74]	38	1			T405	3		T727	1		T742	1
values[75]	50	1			T405	6		T727	2		T742	1
values[76]	51	1			T405	7		T727	12		T742	1
values[77]	50	1			T405	5		T727	7		T742	1
values[78]	44	1			T405	1		T727	2		T742	1
values[79]	40	1			T405	1		T727	1		T742	1
values[80]	47	1			T405	1		T727	2		T742	1
values[81]	54	1			T405	3		T727	4		T742	1
values[82]	66	1			T405	4		T727	2		T742	1
values[83]	43	1			T405	3		T727	1		T742	1
values[84]	55	1			T405	3		T727	1		T742	1
values[85]	47	1			T405	2		T727	5		T742	1
values[86]	56	1			T405	4		T727	6		T742	1
values[87]	52	1			T405	4		T727	2		T742	1
values[88]	40	1			T405	1		T727	2		T742	1
values[89]	52	1			T405	2		T727	2		T742	1
values[90]	59	1			T405	3		T727	1		T742	1
values[91]	48	1			T405	2		T727	4		T742	1
values[92]	48	1			T405	1		T727	1		T742	1
values[93]	59	1			T405	6		T727	1		T742	1
values[94]	65	1			T405	3		T727	4		T742	1
values[95]	56	1			T405	4		T727	1		T742	1
values[96]	68	1			T405	3		T727	2		T742	1
values[97]	57	1			T405	4		T727	3		T742	1
values[98]	54	1			T405	6		T727	2		T742	1
values[99]	66	1			T405	1		T727	11		T742	2
values[100]	68	1			T405	1		T727	13		T742	3
values[101]	67	1			T405	2		T727	7		T742	2
values[102]	69	1			T405	6		T727	3		T742	7
values[103]	73	1			T405	3		T727	5		T742	2
values[104]	65	1			T405	2		T727	5		T742	1
values[105]	61	1			T405	4		T727	4		T742	2
values[106]	57	1			T405	3		T727	6		T742	2
values[107]	68	1			T405	4		T727	5		T742	2
values[108]	66	1			T405	7		T727	3		T742	2
values[109]	77	1			T405	11		T727	1		T742	1
values[110]	73	1			T405	10		T727	2		T742	1
values[111]	57	1			T405	3		T727	2		T742	1
values[112]	64	1			T405	1		T727	5		T742	5
values[113]	90	1			T405	6		T727	2		T742	5
values[114]	78	1			T405	4		T727	1		T742	1
values[115]	78	1			T405	6		T727	2		T742	1
values[116]	68	1			T405	3		T727	5		T742	1
values[117]	84	1			T405	6		T727	3		T742	5
values[118]	107	1			T405	15		T727	5		T742	1
values[119]	108	1			T405	12		T727	1		T742	2
values[120]	99	1			T405	10		T727	5		T742	1
values[121]	80	1			T405	13		T727	6		T742	1
values[122]	103	1			T405	11		T727	21		T742	2
values[123]	143	1			T405	9		T727	36		T742	1
values[124]	145	1			T405	2		T727	26		T742	1
values[125]	209	1			T727	25		T742	1		T740	4
values[126]	548	1			T727	24		T742	15		T740	10
values[127]	2784	1			T727	13		T742	98		T740	110
values[128]	5157	1			T742	189		T740	198		T725	275