Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.gpio_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141890	1			T62	65		T63	17		T64	27
values[2]	9850	1			T62	1		T63	1		T240	10
values[3]	3389	1			T240	15		T480	9		T390	1
values[4]	2117	1			T240	6		T480	9		T492	7
values[5]	1469	1			T240	1		T480	10		T492	10
values[6]	922	1			T240	3		T480	3		T492	8
values[7]	569	1			T240	2		T480	8		T492	3
values[8]	412	1			T240	3		T480	6		T492	7
values[9]	372	1			T240	11		T480	3		T492	6
values[10]	348	1			T240	3		T480	5		T492	15
values[11]	236	1			T240	4		T480	12		T492	5
values[12]	293	1			T240	1		T480	10		T492	4
values[13]	258	1			T240	1		T480	8		T492	6
values[14]	261	1			T240	2		T480	7		T492	9
values[15]	233	1			T240	1		T480	6		T492	8
values[16]	264	1			T240	3		T480	4		T492	10
values[17]	256	1			T240	7		T480	4		T492	7
values[18]	231	1			T240	4		T480	9		T492	3
values[19]	248	1			T240	6		T480	9		T492	5
values[20]	236	1			T240	5		T480	3		T492	7
values[21]	208	1			T240	4		T480	6		T492	5
values[22]	257	1			T240	4		T480	9		T492	19
values[23]	250	1			T240	3		T480	3		T492	5
values[24]	223	1			T240	5		T480	3		T492	4
values[25]	232	1			T240	1		T480	4		T492	6
values[26]	265	1			T240	2		T480	4		T492	28
values[27]	228	1			T240	4		T480	6		T492	10
values[28]	198	1			T240	14		T480	3		T492	4
values[29]	188	1			T240	10		T480	5		T492	5
values[30]	226	1			T240	20		T480	12		T492	5
values[31]	216	1			T240	13		T480	2		T492	11
values[32]	197	1			T240	7		T492	10		T403	5
values[33]	269	1			T240	13		T492	16		T403	7
values[34]	225	1			T240	11		T492	12		T403	10
values[35]	236	1			T240	7		T492	4		T403	17
values[36]	223	1			T240	3		T492	7		T403	7
values[37]	212	1			T240	6		T492	6		T403	9
values[38]	194	1			T240	6		T492	11		T403	4
values[39]	209	1			T240	6		T492	7		T403	8
values[40]	194	1			T240	6		T492	11		T403	5
values[41]	177	1			T240	4		T492	6		T403	4
values[42]	158	1			T240	2		T492	4		T403	4
values[43]	183	1			T240	1		T492	10		T403	7
values[44]	170	1			T240	3		T492	5		T403	6
values[45]	200	1			T240	1		T492	8		T403	3
values[46]	227	1			T240	2		T492	5		T403	12
values[47]	165	1			T240	2		T492	6		T403	3
values[48]	214	1			T240	2		T492	8		T403	3
values[49]	231	1			T240	2		T492	13		T403	6
values[50]	203	1			T240	8		T492	7		T403	5
values[51]	193	1			T240	4		T492	7		T403	9
values[52]	213	1			T240	5		T492	4		T403	15
values[53]	210	1			T240	6		T492	21		T403	4
values[54]	206	1			T240	2		T492	12		T403	12
values[55]	223	1			T240	4		T492	8		T403	8
values[56]	187	1			T240	1		T492	4		T403	12
values[57]	190	1			T240	1		T492	2		T403	4
values[58]	169	1			T240	4		T403	8		T738	1
values[59]	154	1			T240	9		T403	8		T738	1
values[60]	162	1			T240	3		T403	12		T738	1
values[61]	153	1			T240	2		T403	7		T738	1
values[62]	154	1			T240	2		T403	5		T738	1
values[63]	130	1			T240	2		T403	3		T738	1
values[64]	158	1			T240	1		T403	6		T738	1
values[65]	126	1			T240	3		T403	3		T738	1
values[66]	124	1			T240	3		T403	10		T738	1
values[67]	90	1			T240	1		T403	12		T738	1
values[68]	87	1			T240	4		T403	6		T738	1
values[69]	96	1			T240	4		T403	6		T738	1
values[70]	75	1			T240	4		T738	1		T525	1
values[71]	59	1			T240	2		T738	1		T525	1
values[72]	90	1			T240	1		T738	1		T525	1
values[73]	65	1			T240	1		T738	1		T525	1
values[74]	77	1			T240	3		T738	1		T525	1
values[75]	62	1			T240	2		T738	1		T525	6
values[76]	64	1			T240	1		T738	1		T525	3
values[77]	50	1			T240	2		T738	1		T525	4
values[78]	40	1			T240	1		T738	1		T525	6
values[79]	55	1			T240	3		T738	1		T525	4
values[80]	73	1			T240	6		T738	1		T525	12
values[81]	51	1			T240	4		T738	1		T525	4
values[82]	46	1			T240	1		T738	1		T525	11
values[83]	44	1			T240	1		T738	1		T525	3
values[84]	37	1			T240	2		T738	1		T525	1
values[85]	45	1			T240	2		T738	1		T525	1
values[86]	47	1			T240	3		T738	1		T525	2
values[87]	42	1			T240	3		T738	2		T525	3
values[88]	46	1			T240	4		T738	1		T525	2
values[89]	37	1			T240	1		T738	1		T525	1
values[90]	53	1			T240	4		T738	1		T525	9
values[91]	64	1			T240	4		T738	1		T525	12
values[92]	43	1			T240	3		T738	1		T525	3
values[93]	40	1			T240	1		T738	1		T525	3
values[94]	53	1			T240	7		T738	1		T525	1
values[95]	43	1			T240	7		T738	1		T525	2
values[96]	46	1			T240	2		T738	1		T525	2
values[97]	51	1			T240	1		T738	1		T525	1
values[98]	59	1			T240	5		T738	1		T525	2
values[99]	36	1			T240	5		T738	1		T525	2
values[100]	41	1			T240	3		T738	1		T525	1
values[101]	38	1			T240	3		T738	1		T525	6
values[102]	37	1			T240	2		T738	1		T525	3
values[103]	40	1			T240	3		T738	1		T525	2
values[104]	47	1			T240	4		T738	1		T525	3
values[105]	42	1			T240	2		T738	1		T525	1
values[106]	48	1			T240	3		T738	1		T525	1
values[107]	58	1			T240	4		T738	1		T525	3
values[108]	64	1			T240	8		T738	1		T525	2
values[109]	81	1			T240	8		T738	1		T525	3
values[110]	50	1			T240	5		T738	1		T525	2
values[111]	61	1			T240	5		T738	1		T525	6
values[112]	53	1			T240	6		T738	2		T525	2
values[113]	77	1			T240	6		T738	1		T525	3
values[114]	57	1			T240	5		T738	1		T525	2
values[115]	53	1			T240	1		T738	1		T525	1
values[116]	52	1			T240	4		T738	1		T525	1
values[117]	81	1			T240	8		T738	1		T525	4
values[118]	63	1			T240	8		T738	1		T525	3
values[119]	60	1			T240	8		T738	1		T525	1
values[120]	68	1			T240	4		T738	1		T525	3
values[121]	74	1			T240	1		T738	3		T525	2
values[122]	62	1			T738	3		T525	2		T751	7
values[123]	59	1			T738	3		T525	2		T751	2
values[124]	62	1			T738	1		T525	1		T751	6
values[125]	66	1			T738	3		T525	2		T751	2
values[126]	101	1			T738	3		T525	5		T751	11
values[127]	774	1			T738	34		T525	34		T751	18
values[128]	6796	1			T738	398		T525	223		T751	4