Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143473	1			T62	65		T63	26		T64	9
values[2]	10354	1			T63	1		T241	1		T497	1
values[3]	3860	1			T497	1		T401	21		T554	1
values[4]	2313	1			T497	1		T401	19		T389	81
values[5]	1491	1			T497	1		T401	25		T389	81
values[6]	1101	1			T497	1		T401	17		T389	29
values[7]	889	1			T497	1		T401	19		T389	8
values[8]	645	1			T497	1		T401	22		T755	15
values[9]	525	1			T497	1		T401	21		T755	22
values[10]	509	1			T497	1		T401	23		T755	13
values[11]	419	1			T497	1		T401	19		T755	10
values[12]	409	1			T497	1		T401	13		T755	11
values[13]	428	1			T497	1		T401	24		T755	6
values[14]	456	1			T497	1		T401	31		T755	21
values[15]	422	1			T497	1		T401	26		T755	15
values[16]	379	1			T497	1		T401	27		T755	20
values[17]	375	1			T497	1		T401	25		T755	16
values[18]	372	1			T497	1		T401	10		T755	13
values[19]	356	1			T497	1		T401	16		T755	12
values[20]	338	1			T497	1		T401	17		T755	19
values[21]	312	1			T497	1		T401	15		T755	4
values[22]	370	1			T497	1		T401	32		T755	12
values[23]	409	1			T497	1		T401	31		T755	31
values[24]	381	1			T497	1		T401	19		T755	14
values[25]	355	1			T497	1		T401	13		T755	15
values[26]	379	1			T497	1		T401	20		T755	14
values[27]	331	1			T497	1		T401	27		T755	10
values[28]	358	1			T497	1		T401	13		T755	18
values[29]	383	1			T497	1		T401	25		T755	20
values[30]	312	1			T497	1		T401	34		T755	6
values[31]	335	1			T497	2		T401	35		T755	8
values[32]	348	1			T497	1		T401	32		T755	13
values[33]	329	1			T497	1		T401	20		T755	25
values[34]	326	1			T497	1		T401	30		T755	8
values[35]	346	1			T497	1		T401	23		T755	10
values[36]	354	1			T497	1		T401	18		T755	9
values[37]	345	1			T497	1		T401	16		T755	22
values[38]	364	1			T497	1		T401	26		T755	33
values[39]	377	1			T497	1		T401	16		T755	10
values[40]	366	1			T497	1		T401	49		T755	9
values[41]	417	1			T497	1		T401	20		T755	8
values[42]	348	1			T497	1		T401	27		T755	21
values[43]	333	1			T497	1		T401	22		T755	12
values[44]	302	1			T497	1		T401	13		T755	7
values[45]	356	1			T497	1		T401	16		T755	16
values[46]	350	1			T497	1		T401	18		T755	21
values[47]	343	1			T497	1		T401	26		T755	14
values[48]	341	1			T497	1		T401	14		T755	23
values[49]	329	1			T497	1		T401	40		T755	21
values[50]	347	1			T497	1		T401	30		T755	17
values[51]	280	1			T497	1		T401	18		T755	19
values[52]	296	1			T497	1		T401	23		T755	16
values[53]	285	1			T497	1		T401	15		T755	15
values[54]	364	1			T497	1		T401	53		T755	10
values[55]	336	1			T497	1		T401	31		T755	16
values[56]	305	1			T497	2		T401	18		T755	22
values[57]	310	1			T497	1		T401	21		T755	8
values[58]	289	1			T497	1		T401	19		T755	16
values[59]	278	1			T497	1		T401	30		T755	11
values[60]	282	1			T497	1		T401	17		T755	10
values[61]	209	1			T497	1		T401	8		T755	16
values[62]	203	1			T497	1		T401	8		T755	9
values[63]	221	1			T497	1		T401	11		T755	27
values[64]	189	1			T497	1		T401	10		T755	10
values[65]	221	1			T497	1		T401	26		T755	18
values[66]	189	1			T497	1		T401	12		T755	17
values[67]	196	1			T497	1		T401	12		T755	8
values[68]	166	1			T497	1		T401	8		T755	16
values[69]	188	1			T497	1		T401	13		T755	13
values[70]	141	1			T497	1		T401	9		T755	6
values[71]	124	1			T497	1		T401	2		T755	5
values[72]	125	1			T497	1		T755	7		T722	1
values[73]	134	1			T497	1		T755	9		T722	1
values[74]	122	1			T497	1		T755	5		T722	1
values[75]	103	1			T497	1		T722	1		T408	2
values[76]	84	1			T497	1		T722	1		T408	2
values[77]	83	1			T497	1		T722	1		T408	4
values[78]	82	1			T497	1		T722	2		T408	7
values[79]	104	1			T497	1		T722	1		T408	6
values[80]	88	1			T497	1		T722	1		T408	1
values[81]	84	1			T497	1		T722	1		T408	6
values[82]	93	1			T497	1		T722	1		T408	4
values[83]	78	1			T497	1		T722	1		T408	3
values[84]	75	1			T497	1		T722	1		T408	1
values[85]	73	1			T497	1		T722	1		T408	1
values[86]	74	1			T497	2		T722	1		T408	2
values[87]	85	1			T497	1		T722	1		T408	2
values[88]	84	1			T497	1		T722	1		T408	3
values[89]	87	1			T497	1		T722	1		T408	2
values[90]	97	1			T497	1		T722	1		T408	5
values[91]	82	1			T497	1		T722	1		T408	4
values[92]	94	1			T497	1		T722	1		T408	3
values[93]	79	1			T497	1		T722	1		T408	1
values[94]	92	1			T497	1		T722	1		T408	1
values[95]	81	1			T497	1		T722	1		T408	3
values[96]	100	1			T497	1		T722	1		T408	3
values[97]	100	1			T497	1		T722	2		T408	4
values[98]	95	1			T497	1		T722	1		T408	1
values[99]	93	1			T497	1		T722	1		T408	1
values[100]	90	1			T497	1		T722	1		T408	4
values[101]	95	1			T497	2		T722	1		T408	4
values[102]	85	1			T497	1		T722	1		T408	1
values[103]	87	1			T497	1		T722	1		T408	2
values[104]	81	1			T497	5		T722	1		T408	2
values[105]	109	1			T497	4		T722	1		T408	5
values[106]	83	1			T497	4		T722	1		T408	3
values[107]	78	1			T497	1		T722	1		T408	4
values[108]	97	1			T497	1		T722	1		T408	3
values[109]	75	1			T497	3		T722	1		T408	2
values[110]	78	1			T497	1		T722	1		T408	3
values[111]	72	1			T497	1		T722	1		T408	2
values[112]	69	1			T497	1		T722	1		T408	2
values[113]	96	1			T497	2		T722	1		T408	1
values[114]	76	1			T497	4		T722	1		T408	8
values[115]	86	1			T497	7		T722	1		T408	6
values[116]	59	1			T497	1		T722	1		T408	3
values[117]	73	1			T497	2		T722	1		T408	6
values[118]	78	1			T497	5		T722	1		T408	3
values[119]	71	1			T497	2		T722	1		T408	5
values[120]	76	1			T497	2		T722	1		T408	7
values[121]	77	1			T497	3		T722	1		T408	4
values[122]	58	1			T497	1		T722	3		T408	2
values[123]	63	1			T497	1		T722	4		T408	3
values[124]	63	1			T497	1		T722	1		T408	6
values[125]	78	1			T497	2		T722	4		T408	7
values[126]	121	1			T497	2		T722	1		T408	20
values[127]	806	1			T497	34		T722	20		T408	30
values[128]	6998	1			T497	295		T722	270		T408	17