Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139923	1			T62	72		T63	17		T64	16
values[2]	9926	1			T191	1		T242	1		T240	166
values[3]	3808	1			T240	96		T480	51		T388	1
values[4]	2157	1			T240	46		T480	21		T401	11
values[5]	1499	1			T240	37		T480	18		T389	19
values[6]	1019	1			T240	8		T480	12		T389	17
values[7]	732	1			T240	6		T480	6		T389	18
values[8]	612	1			T480	13		T389	4		T404	6
values[9]	507	1			T480	12		T404	11		T525	1
values[10]	410	1			T480	4		T404	3		T525	1
values[11]	377	1			T480	4		T404	7		T525	1
values[12]	354	1			T480	9		T404	4		T525	1
values[13]	343	1			T480	7		T404	10		T525	1
values[14]	332	1			T480	4		T404	6		T525	1
values[15]	351	1			T480	6		T404	6		T525	1
values[16]	321	1			T480	7		T404	3		T525	1
values[17]	283	1			T480	15		T404	6		T525	1
values[18]	300	1			T480	11		T404	15		T525	1
values[19]	274	1			T480	4		T404	14		T525	1
values[20]	304	1			T480	4		T404	9		T525	1
values[21]	277	1			T480	6		T404	2		T525	1
values[22]	314	1			T480	7		T404	8		T525	1
values[23]	303	1			T480	4		T404	7		T525	1
values[24]	337	1			T480	14		T404	3		T525	1
values[25]	321	1			T480	14		T404	4		T525	1
values[26]	266	1			T480	6		T404	8		T525	1
values[27]	318	1			T480	3		T404	4		T525	1
values[28]	286	1			T480	7		T404	13		T525	1
values[29]	266	1			T480	3		T404	6		T525	1
values[30]	273	1			T480	9		T404	12		T525	1
values[31]	292	1			T480	14		T404	4		T525	1
values[32]	285	1			T480	12		T404	4		T525	1
values[33]	325	1			T480	3		T404	3		T525	1
values[34]	286	1			T480	4		T404	4		T525	1
values[35]	330	1			T480	19		T404	16		T525	1
values[36]	304	1			T480	10		T404	7		T525	1
values[37]	268	1			T480	6		T404	4		T525	1
values[38]	262	1			T480	9		T404	3		T525	1
values[39]	256	1			T480	9		T404	12		T525	1
values[40]	255	1			T480	3		T404	6		T525	1
values[41]	333	1			T480	20		T404	6		T525	1
values[42]	301	1			T480	5		T404	5		T525	1
values[43]	322	1			T480	8		T404	3		T525	1
values[44]	268	1			T480	3		T404	4		T525	1
values[45]	294	1			T480	8		T404	14		T525	1
values[46]	257	1			T480	7		T404	6		T525	1
values[47]	281	1			T480	7		T404	14		T525	1
values[48]	247	1			T480	4		T404	19		T525	1
values[49]	282	1			T480	7		T404	8		T525	1
values[50]	272	1			T480	5		T404	8		T525	1
values[51]	221	1			T480	7		T404	4		T525	1
values[52]	222	1			T480	5		T404	5		T525	1
values[53]	240	1			T480	18		T404	6		T525	1
values[54]	217	1			T480	6		T404	10		T525	1
values[55]	244	1			T480	7		T404	6		T525	1
values[56]	204	1			T480	5		T404	6		T525	1
values[57]	203	1			T480	4		T404	6		T525	1
values[58]	215	1			T480	3		T404	6		T525	1
values[59]	190	1			T480	5		T404	6		T525	2
values[60]	176	1			T480	14		T404	7		T525	1
values[61]	158	1			T480	2		T404	12		T525	1
values[62]	161	1			T404	6		T525	1		T411	6
values[63]	156	1			T404	3		T525	1		T411	1
values[64]	171	1			T404	19		T525	1		T411	4
values[65]	157	1			T404	30		T525	1		T411	4
values[66]	169	1			T404	13		T525	1		T411	1
values[67]	120	1			T404	3		T525	1		T411	1
values[68]	120	1			T404	9		T525	1		T411	3
values[69]	112	1			T404	3		T525	1		T411	2
values[70]	98	1			T404	3		T525	1		T411	1
values[71]	95	1			T404	3		T525	1		T411	1
values[72]	115	1			T404	14		T525	1		T411	2
values[73]	75	1			T404	4		T525	1		T411	2
values[74]	92	1			T404	2		T525	1		T411	4
values[75]	96	1			T404	3		T525	1		T411	3
values[76]	76	1			T404	3		T525	1		T411	1
values[77]	64	1			T404	1		T525	1		T411	4
values[78]	70	1			T525	1		T411	3		T408	10
values[79]	76	1			T525	1		T411	5		T408	5
values[80]	78	1			T525	1		T411	11		T408	12
values[81]	92	1			T525	1		T411	4		T408	12
values[82]	77	1			T525	1		T411	5		T408	7
values[83]	75	1			T525	1		T411	2		T408	7
values[84]	69	1			T525	1		T411	4		T408	9
values[85]	88	1			T525	2		T411	3		T408	19
values[86]	82	1			T525	1		T411	3		T408	15
values[87]	67	1			T525	1		T411	4		T408	4
values[88]	59	1			T525	1		T411	6		T408	5
values[89]	68	1			T525	1		T411	7		T408	4
values[90]	67	1			T525	1		T411	4		T408	4
values[91]	84	1			T525	1		T411	3		T408	8
values[92]	72	1			T525	1		T411	4		T408	12
values[93]	61	1			T525	1		T411	1		T408	9
values[94]	73	1			T525	1		T411	1		T408	8
values[95]	77	1			T525	1		T411	3		T408	7
values[96]	81	1			T525	1		T411	4		T408	15
values[97]	74	1			T525	1		T411	1		T408	15
values[98]	94	1			T525	2		T411	1		T408	7
values[99]	118	1			T525	7		T411	4		T408	2
values[100]	94	1			T525	4		T411	6		T408	4
values[101]	64	1			T525	2		T411	8		T754	3
values[102]	69	1			T525	3		T411	4		T754	1
values[103]	91	1			T525	2		T411	6		T754	1
values[104]	116	1			T525	2		T411	3		T754	3
values[105]	72	1			T525	4		T411	4		T754	1
values[106]	65	1			T525	4		T411	5		T754	1
values[107]	80	1			T525	5		T411	4		T754	4
values[108]	66	1			T525	1		T411	7		T754	1
values[109]	68	1			T525	1		T411	2		T754	3
values[110]	74	1			T525	1		T411	2		T754	1
values[111]	69	1			T525	1		T411	5		T754	1
values[112]	65	1			T525	2		T411	3		T754	1
values[113]	65	1			T525	1		T411	6		T754	2
values[114]	67	1			T525	2		T411	4		T754	1
values[115]	76	1			T525	1		T411	9		T754	2
values[116]	69	1			T525	1		T411	5		T754	1
values[117]	60	1			T525	1		T411	3		T754	1
values[118]	84	1			T525	8		T411	1		T754	2
values[119]	65	1			T525	1		T411	3		T754	1
values[120]	60	1			T525	2		T411	3		T754	1
values[121]	74	1			T525	1		T411	2		T754	1
values[122]	78	1			T525	1		T411	4		T754	1
values[123]	73	1			T525	2		T411	3		T754	6
values[124]	64	1			T525	1		T411	4		T754	1
values[125]	82	1			T525	4		T411	10		T754	3
values[126]	126	1			T525	7		T411	9		T754	4
values[127]	614	1			T525	31		T411	19		T754	22
values[128]	4020	1			T525	273		T411	9		T754	289