Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwm_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139843	1			T62	63		T63	10		T64	16
values[2]	10208	1			T62	1		T63	1		T240	269
values[3]	3953	1			T240	180		T396	1		T388	1
values[4]	2149	1			T240	112		T492	12		T721	6
values[5]	1347	1			T240	46		T492	8		T721	2
values[6]	941	1			T240	39		T492	19		T721	2
values[7]	657	1			T240	20		T492	10		T721	3
values[8]	483	1			T240	9		T492	8		T721	3
values[9]	350	1			T492	3		T721	4		T405	2
values[10]	322	1			T721	1		T405	4		T416	3
values[11]	324	1			T721	1		T405	2		T416	4
values[12]	250	1			T405	1		T416	3		T433	1
values[13]	249	1			T405	2		T416	2		T433	2
values[14]	234	1			T405	3		T416	1		T433	1
values[15]	282	1			T405	3		T416	1		T433	5
values[16]	285	1			T405	9		T416	3		T433	5
values[17]	283	1			T405	11		T416	8		T433	4
values[18]	232	1			T405	2		T416	6		T433	2
values[19]	256	1			T405	4		T416	5		T433	1
values[20]	201	1			T405	1		T416	5		T433	2
values[21]	251	1			T405	5		T416	8		T433	1
values[22]	242	1			T405	6		T416	9		T433	1
values[23]	271	1			T405	12		T416	15		T433	2
values[24]	285	1			T405	7		T416	5		T433	2
values[25]	221	1			T405	6		T416	4		T433	3
values[26]	215	1			T405	11		T416	1		T433	4
values[27]	198	1			T405	11		T416	1		T433	3
values[28]	208	1			T405	3		T416	1		T433	5
values[29]	244	1			T405	2		T416	2		T433	2
values[30]	214	1			T405	1		T416	1		T433	3
values[31]	171	1			T405	2		T416	1		T433	4
values[32]	227	1			T405	6		T416	2		T433	2
values[33]	210	1			T405	5		T416	7		T433	3
values[34]	212	1			T405	3		T416	3		T433	5
values[35]	206	1			T405	4		T416	3		T433	2
values[36]	208	1			T405	9		T416	2		T433	9
values[37]	210	1			T405	7		T416	3		T433	6
values[38]	160	1			T405	7		T416	2		T433	3
values[39]	210	1			T405	3		T416	2		T433	1
values[40]	219	1			T405	1		T416	2		T433	3
values[41]	226	1			T405	3		T416	3		T433	6
values[42]	206	1			T405	6		T416	1		T433	9
values[43]	200	1			T405	2		T416	1		T433	3
values[44]	223	1			T405	5		T416	2		T433	6
values[45]	211	1			T405	2		T416	2		T433	2
values[46]	203	1			T405	1		T416	2		T433	2
values[47]	165	1			T405	2		T416	1		T433	1
values[48]	196	1			T405	1		T416	3		T433	2
values[49]	169	1			T405	1		T416	3		T433	5
values[50]	147	1			T405	2		T416	2		T433	3
values[51]	142	1			T405	1		T416	3		T433	7
values[52]	152	1			T405	7		T416	1		T433	1
values[53]	145	1			T405	4		T416	4		T433	1
values[54]	184	1			T405	1		T416	1		T433	2
values[55]	151	1			T405	3		T416	1		T433	2
values[56]	152	1			T405	1		T416	2		T433	1
values[57]	169	1			T405	2		T416	5		T433	2
values[58]	150	1			T405	2		T416	6		T433	3
values[59]	153	1			T405	2		T416	1		T433	2
values[60]	166	1			T405	1		T416	1		T433	2
values[61]	147	1			T405	2		T416	5		T433	1
values[62]	102	1			T405	1		T416	1		T433	6
values[63]	112	1			T405	3		T416	3		T433	5
values[64]	131	1			T405	2		T416	1		T433	4
values[65]	110	1			T405	1		T416	1		T433	1
values[66]	137	1			T405	14		T416	5		T433	3
values[67]	141	1			T405	6		T416	11		T433	1
values[68]	117	1			T405	3		T416	5		T433	2
values[69]	134	1			T405	7		T416	13		T433	6
values[70]	104	1			T405	4		T416	5		T433	2
values[71]	125	1			T405	5		T416	6		T433	3
values[72]	115	1			T405	5		T416	1		T433	2
values[73]	128	1			T405	9		T416	8		T433	2
values[74]	132	1			T405	4		T416	8		T433	7
values[75]	95	1			T405	10		T416	11		T433	2
values[76]	82	1			T405	4		T416	6		T433	4
values[77]	102	1			T405	3		T416	6		T433	1
values[78]	108	1			T405	4		T416	5		T433	2
values[79]	75	1			T405	6		T416	2		T433	2
values[80]	85	1			T405	7		T416	7		T433	8
values[81]	74	1			T405	13		T416	4		T433	11
values[82]	107	1			T405	25		T416	7		T433	7
values[83]	104	1			T405	19		T416	5		T433	7
values[84]	105	1			T405	12		T416	19		T433	6
values[85]	99	1			T405	17		T416	7		T433	2
values[86]	95	1			T405	8		T416	4		T433	6
values[87]	95	1			T405	3		T416	2		T433	4
values[88]	121	1			T405	3		T416	6		T433	5
values[89]	108	1			T405	6		T416	4		T433	9
values[90]	96	1			T405	3		T416	6		T433	11
values[91]	109	1			T405	4		T416	5		T433	12
values[92]	83	1			T405	4		T433	5		T734	1
values[93]	95	1			T405	6		T433	5		T734	1
values[94]	92	1			T405	2		T433	7		T734	1
values[95]	89	1			T405	7		T433	5		T734	1
values[96]	86	1			T405	4		T433	2		T734	1
values[97]	98	1			T405	3		T433	2		T734	1
values[98]	101	1			T405	3		T433	2		T734	1
values[99]	95	1			T405	3		T433	4		T734	1
values[100]	97	1			T405	3		T433	6		T734	1
values[101]	117	1			T405	5		T433	10		T734	4
values[102]	86	1			T405	4		T433	5		T734	1
values[103]	90	1			T405	4		T433	1		T734	4
values[104]	85	1			T405	3		T433	3		T734	3
values[105]	81	1			T405	4		T433	1		T734	1
values[106]	90	1			T405	5		T433	8		T734	3
values[107]	99	1			T405	7		T433	3		T734	3
values[108]	108	1			T433	1		T734	1		T729	2
values[109]	90	1			T433	2		T734	2		T729	3
values[110]	76	1			T433	2		T734	2		T729	2
values[111]	73	1			T433	2		T734	1		T729	2
values[112]	76	1			T433	6		T734	2		T729	3
values[113]	70	1			T433	4		T734	2		T729	8
values[114]	57	1			T433	1		T734	2		T729	3
values[115]	72	1			T433	5		T734	1		T729	3
values[116]	94	1			T433	5		T734	1		T729	4
values[117]	91	1			T433	3		T734	4		T729	10
values[118]	71	1			T433	2		T734	2		T729	5
values[119]	75	1			T433	5		T734	1		T729	4
values[120]	85	1			T433	7		T734	2		T729	3
values[121]	83	1			T433	10		T734	3		T729	2
values[122]	79	1			T433	6		T734	1		T729	3
values[123]	66	1			T433	3		T734	4		T729	4
values[124]	66	1			T433	4		T734	4		T729	3
values[125]	81	1			T433	2		T734	3		T729	4
values[126]	123	1			T433	12		T734	3		T729	3
values[127]	783	1			T433	11		T734	31		T729	62
values[128]	6771	1			T433	6		T734	293		T729	641