Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwrmgr_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	137712	1			T62	90		T63	16		T64	10
values[2]	8827	1			T62	1		T63	2		T241	1
values[3]	3226	1			T480	6		T401	1		T554	1
values[4]	1913	1			T480	8		T741	12		T525	1
values[5]	1256	1			T480	8		T741	2		T525	1
values[6]	892	1			T480	4		T525	1		T406	7
values[7]	683	1			T480	9		T525	1		T406	4
values[8]	591	1			T480	7		T525	1		T406	6
values[9]	526	1			T480	18		T525	1		T406	8
values[10]	420	1			T480	5		T525	1		T406	6
values[11]	448	1			T480	8		T525	1		T406	6
values[12]	440	1			T480	8		T525	1		T406	4
values[13]	399	1			T480	8		T525	1		T406	6
values[14]	383	1			T480	11		T525	1		T406	3
values[15]	419	1			T480	6		T525	1		T406	7
values[16]	369	1			T480	12		T525	1		T406	6
values[17]	338	1			T480	4		T525	1		T406	11
values[18]	334	1			T480	6		T525	1		T406	20
values[19]	357	1			T480	5		T525	1		T406	7
values[20]	364	1			T480	6		T525	1		T406	7
values[21]	293	1			T480	7		T525	1		T406	6
values[22]	301	1			T480	4		T525	1		T406	8
values[23]	339	1			T480	3		T525	1		T406	6
values[24]	301	1			T480	11		T525	1		T406	6
values[25]	333	1			T480	11		T525	1		T406	26
values[26]	310	1			T480	8		T525	1		T406	13
values[27]	269	1			T480	3		T525	1		T406	7
values[28]	323	1			T480	3		T525	1		T406	12
values[29]	296	1			T480	5		T525	1		T406	9
values[30]	285	1			T480	3		T525	1		T406	5
values[31]	316	1			T480	7		T525	1		T406	7
values[32]	268	1			T480	5		T525	1		T406	8
values[33]	315	1			T480	4		T525	1		T406	4
values[34]	310	1			T480	15		T525	1		T406	4
values[35]	300	1			T480	11		T525	1		T406	7
values[36]	303	1			T480	13		T525	1		T406	5
values[37]	383	1			T480	6		T525	1		T406	7
values[38]	316	1			T480	6		T525	1		T406	3
values[39]	318	1			T480	5		T525	1		T406	7
values[40]	279	1			T480	4		T525	1		T406	10
values[41]	335	1			T480	5		T525	2		T406	8
values[42]	277	1			T480	5		T525	1		T406	11
values[43]	259	1			T480	4		T525	1		T406	10
values[44]	282	1			T480	9		T525	1		T406	4
values[45]	308	1			T480	8		T525	1		T406	6
values[46]	308	1			T480	12		T525	1		T406	1
values[47]	330	1			T480	17		T525	1		T580	2
values[48]	279	1			T480	3		T525	1		T580	1
values[49]	290	1			T480	6		T525	1		T580	2
values[50]	279	1			T480	6		T525	1		T580	4
values[51]	267	1			T480	11		T525	1		T580	6
values[52]	224	1			T480	5		T525	1		T580	3
values[53]	244	1			T480	5		T525	1		T580	3
values[54]	252	1			T480	7		T525	1		T580	2
values[55]	231	1			T480	5		T525	1		T580	2
values[56]	252	1			T480	9		T525	1		T580	2
values[57]	267	1			T480	6		T525	1		T580	5
values[58]	197	1			T525	1		T580	1		T416	3
values[59]	242	1			T525	1		T580	2		T733	8
values[60]	208	1			T525	1		T580	2		T733	10
values[61]	169	1			T525	1		T580	1		T733	3
values[62]	183	1			T525	1		T580	5		T733	6
values[63]	158	1			T525	1		T580	2		T733	11
values[64]	164	1			T525	1		T580	4		T733	4
values[65]	141	1			T525	1		T580	3		T733	9
values[66]	163	1			T525	1		T580	4		T733	12
values[67]	145	1			T525	1		T580	6		T733	15
values[68]	117	1			T525	1		T580	5		T760	2
values[69]	119	1			T525	1		T580	1		T760	1
values[70]	117	1			T525	1		T580	1		T760	1
values[71]	113	1			T525	1		T580	1		T760	1
values[72]	101	1			T525	1		T580	2		T760	1
values[73]	96	1			T525	1		T580	1		T760	1
values[74]	76	1			T525	1		T580	1		T760	1
values[75]	91	1			T525	1		T580	5		T760	1
values[76]	90	1			T525	1		T580	1		T760	1
values[77]	93	1			T525	1		T580	5		T760	1
values[78]	76	1			T525	1		T580	4		T760	1
values[79]	68	1			T525	1		T580	7		T760	1
values[80]	77	1			T525	1		T580	8		T760	1
values[81]	82	1			T525	1		T580	3		T760	1
values[82]	67	1			T525	1		T580	4		T760	1
values[83]	86	1			T525	1		T580	6		T760	1
values[84]	79	1			T525	1		T580	9		T760	1
values[85]	79	1			T525	1		T580	8		T760	1
values[86]	71	1			T525	1		T580	5		T760	1
values[87]	83	1			T525	1		T580	4		T760	1
values[88]	73	1			T525	1		T580	1		T760	1
values[89]	85	1			T525	1		T580	4		T760	1
values[90]	98	1			T525	1		T580	10		T760	1
values[91]	102	1			T525	1		T580	11		T760	1
values[92]	80	1			T525	1		T580	3		T760	1
values[93]	70	1			T525	1		T580	4		T760	1
values[94]	85	1			T525	1		T580	7		T760	1
values[95]	89	1			T525	1		T580	1		T760	1
values[96]	82	1			T525	1		T580	7		T760	1
values[97]	77	1			T525	1		T580	5		T760	1
values[98]	89	1			T525	1		T580	4		T760	1
values[99]	88	1			T525	1		T580	7		T760	5
values[100]	80	1			T525	1		T580	1		T760	1
values[101]	79	1			T525	1		T580	5		T760	1
values[102]	96	1			T525	1		T580	8		T760	9
values[103]	75	1			T525	1		T580	2		T760	1
values[104]	73	1			T525	1		T580	3		T760	2
values[105]	73	1			T525	2		T580	4		T760	5
values[106]	82	1			T525	1		T580	5		T760	3
values[107]	58	1			T525	1		T580	2		T760	4
values[108]	74	1			T525	1		T580	10		T760	2
values[109]	61	1			T525	1		T580	4		T760	2
values[110]	65	1			T525	1		T580	5		T760	3
values[111]	65	1			T525	1		T580	9		T760	1
values[112]	64	1			T525	1		T580	4		T760	2
values[113]	57	1			T525	1		T580	5		T760	1
values[114]	63	1			T525	1		T580	3		T760	2
values[115]	67	1			T525	1		T580	3		T760	3
values[116]	95	1			T525	1		T580	8		T760	2
values[117]	82	1			T525	1		T580	2		T760	2
values[118]	78	1			T525	1		T580	3		T760	3
values[119]	73	1			T525	1		T580	4		T760	1
values[120]	77	1			T525	1		T580	8		T760	2
values[121]	82	1			T525	1		T580	11		T760	1
values[122]	65	1			T525	1		T580	4		T760	2
values[123]	73	1			T525	1		T580	4		T760	3
values[124]	84	1			T525	1		T580	4		T760	2
values[125]	84	1			T525	1		T580	6		T760	1
values[126]	122	1			T525	1		T580	1		T760	3
values[127]	1001	1			T525	38		T580	3		T760	43
values[128]	7845	1			T525	387		T580	1		T760	313