Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141783	1			T62	77		T63	18		T64	18
values[2]	10426	1			T63	2		T241	1		T483	4
values[3]	4911	1			T63	1		T401	8		T554	1
values[4]	2942	1			T63	1		T401	14		T389	1
values[5]	1883	1			T401	6		T389	7		T407	14
values[6]	1322	1			T401	25		T389	36		T407	8
values[7]	1059	1			T401	13		T389	34		T407	12
values[8]	852	1			T401	5		T389	15		T407	13
values[9]	732	1			T401	15		T389	8		T407	7
values[10]	703	1			T401	16		T389	4		T407	16
values[11]	608	1			T401	8		T389	5		T407	9
values[12]	547	1			T401	7		T389	1		T407	16
values[13]	555	1			T401	16		T389	3		T407	9
values[14]	535	1			T401	8		T389	5		T407	11
values[15]	480	1			T401	4		T389	2		T407	7
values[16]	510	1			T401	17		T389	2		T407	4
values[17]	476	1			T401	19		T389	2		T407	8
values[18]	434	1			T401	6		T389	2		T407	10
values[19]	439	1			T401	5		T389	2		T407	11
values[20]	391	1			T401	4		T389	3		T407	4
values[21]	337	1			T401	11		T389	6		T407	5
values[22]	361	1			T401	8		T389	1		T407	8
values[23]	428	1			T401	17		T407	21		T411	4
values[24]	406	1			T401	6		T407	10		T411	1
values[25]	316	1			T401	11		T407	9		T411	1
values[26]	400	1			T401	6		T407	6		T411	8
values[27]	409	1			T401	3		T407	10		T411	11
values[28]	393	1			T401	13		T407	11		T411	7
values[29]	293	1			T401	5		T407	14		T411	8
values[30]	299	1			T401	8		T407	10		T411	9
values[31]	336	1			T401	11		T407	6		T411	11
values[32]	344	1			T401	13		T407	5		T411	8
values[33]	289	1			T401	11		T407	6		T411	6
values[34]	303	1			T401	7		T407	7		T411	7
values[35]	324	1			T401	9		T407	38		T411	1
values[36]	373	1			T401	19		T407	5		T411	4
values[37]	302	1			T401	4		T407	7		T411	2
values[38]	349	1			T401	15		T407	7		T411	4
values[39]	314	1			T401	5		T407	28		T411	7
values[40]	345	1			T401	4		T407	12		T411	13
values[41]	249	1			T401	12		T411	4		T580	5
values[42]	261	1			T401	16		T411	3		T580	6
values[43]	255	1			T401	4		T411	2		T580	5
values[44]	227	1			T401	7		T411	11		T580	1
values[45]	264	1			T401	13		T411	8		T580	1
values[46]	249	1			T401	14		T411	9		T580	3
values[47]	239	1			T401	23		T411	1		T580	1
values[48]	304	1			T401	15		T411	6		T580	2
values[49]	242	1			T401	7		T411	3		T580	2
values[50]	173	1			T401	8		T411	3		T580	2
values[51]	187	1			T401	3		T411	9		T580	10
values[52]	171	1			T411	11		T580	4		T742	1
values[53]	152	1			T411	3		T580	2		T742	1
values[54]	97	1			T411	2		T580	4		T742	1
values[55]	85	1			T411	5		T580	4		T742	1
values[56]	81	1			T411	6		T580	4		T742	1
values[57]	73	1			T411	9		T580	2		T742	1
values[58]	80	1			T411	9		T580	5		T742	1
values[59]	70	1			T411	2		T580	4		T742	1
values[60]	71	1			T411	1		T580	3		T742	1
values[61]	72	1			T411	2		T580	9		T742	1
values[62]	84	1			T411	1		T580	13		T742	1
values[63]	89	1			T411	2		T580	6		T742	1
values[64]	96	1			T411	3		T580	2		T742	1
values[65]	123	1			T411	1		T580	1		T742	1
values[66]	124	1			T411	2		T580	2		T742	1
values[67]	95	1			T411	1		T580	5		T742	1
values[68]	67	1			T411	4		T580	1		T742	1
values[69]	79	1			T411	2		T580	3		T742	1
values[70]	68	1			T411	3		T580	3		T742	1
values[71]	95	1			T411	4		T580	5		T742	1
values[72]	110	1			T411	1		T580	8		T742	1
values[73]	115	1			T411	5		T580	5		T742	1
values[74]	104	1			T411	2		T580	1		T742	1
values[75]	87	1			T411	4		T580	1		T742	1
values[76]	83	1			T411	8		T580	8		T742	1
values[77]	79	1			T411	11		T580	6		T742	1
values[78]	72	1			T411	7		T580	2		T742	1
values[79]	73	1			T411	6		T580	5		T742	1
values[80]	77	1			T411	8		T580	7		T742	1
values[81]	80	1			T411	5		T580	6		T742	1
values[82]	83	1			T411	3		T580	2		T742	1
values[83]	78	1			T411	6		T580	9		T742	1
values[84]	54	1			T411	4		T580	3		T742	1
values[85]	70	1			T411	7		T580	5		T742	1
values[86]	43	1			T580	4		T742	1		T765	3
values[87]	40	1			T580	5		T742	1		T765	3
values[88]	46	1			T580	9		T742	2		T765	4
values[89]	62	1			T580	6		T742	1		T765	23
values[90]	68	1			T580	3		T742	1		T765	10
values[91]	71	1			T580	4		T742	1		T765	12
values[92]	50	1			T580	1		T742	1		T765	9
values[93]	48	1			T580	2		T742	1		T765	7
values[94]	55	1			T580	4		T742	1		T765	7
values[95]	41	1			T580	1		T742	1		T765	5
values[96]	41	1			T580	2		T742	1		T765	7
values[97]	54	1			T580	4		T742	1		T765	7
values[98]	45	1			T580	3		T742	1		T761	3
values[99]	47	1			T580	5		T742	1		T761	3
values[100]	41	1			T580	2		T742	1		T761	1
values[101]	48	1			T580	2		T742	1		T761	2
values[102]	44	1			T580	1		T742	1		T761	1
values[103]	39	1			T580	2		T742	1		T761	3
values[104]	50	1			T580	2		T742	1		T761	3
values[105]	42	1			T580	2		T742	1		T761	2
values[106]	42	1			T580	1		T742	1		T761	4
values[107]	59	1			T580	4		T742	1		T761	6
values[108]	61	1			T580	10		T742	1		T761	1
values[109]	39	1			T580	3		T742	1		T761	1
values[110]	43	1			T580	2		T742	1		T761	5
values[111]	45	1			T580	3		T742	1		T761	1
values[112]	36	1			T580	6		T742	1		T761	1
values[113]	37	1			T580	2		T742	1		T761	1
values[114]	40	1			T580	3		T742	1		T761	1
values[115]	38	1			T580	4		T742	2		T761	1
values[116]	40	1			T580	3		T742	6		T761	3
values[117]	40	1			T580	4		T742	3		T761	2
values[118]	36	1			T580	3		T742	1		T761	1
values[119]	41	1			T580	1		T742	1		T761	1
values[120]	34	1			T742	2		T761	2		T731	1
values[121]	39	1			T742	3		T761	6		T731	5
values[122]	38	1			T742	1		T761	2		T731	1
values[123]	42	1			T742	1		T761	1		T731	1
values[124]	46	1			T742	6		T761	1		T731	3
values[125]	44	1			T742	5		T761	1		T731	2
values[126]	108	1			T742	3		T761	3		T731	8
values[127]	1192	1			T742	52		T761	59		T731	77
values[128]	5577	1			T742	320		T761	287		T731	298