Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138008	1			T62	86		T63	11		T64	20
values[2]	9257	1			T63	2		T241	1		T493	1
values[3]	3702	1			T479	117		T490	1		T388	1
values[4]	2222	1			T479	92		T587	7		T404	11
values[5]	1565	1			T479	45		T587	9		T404	5
values[6]	1044	1			T479	24		T587	5		T404	15
values[7]	799	1			T479	4		T587	12		T404	5
values[8]	597	1			T587	3		T404	2		T747	24
values[9]	498	1			T587	8		T404	13		T747	19
values[10]	427	1			T587	5		T404	3		T747	19
values[11]	387	1			T587	3		T404	3		T747	15
values[12]	355	1			T587	18		T404	18		T747	21
values[13]	381	1			T587	9		T404	11		T747	13
values[14]	363	1			T587	7		T404	14		T747	7
values[15]	364	1			T587	5		T404	4		T747	5
values[16]	370	1			T587	7		T404	3		T747	9
values[17]	349	1			T587	4		T404	4		T747	3
values[18]	323	1			T587	9		T404	6		T722	1
values[19]	332	1			T587	6		T404	11		T722	1
values[20]	329	1			T587	4		T404	18		T722	1
values[21]	303	1			T587	10		T404	4		T722	1
values[22]	335	1			T587	10		T404	7		T722	1
values[23]	302	1			T587	5		T404	3		T722	1
values[24]	304	1			T587	26		T404	5		T722	1
values[25]	331	1			T587	6		T404	3		T722	1
values[26]	298	1			T587	2		T404	11		T722	1
values[27]	293	1			T587	3		T404	7		T722	1
values[28]	322	1			T587	9		T404	10		T722	1
values[29]	335	1			T587	5		T404	4		T722	1
values[30]	357	1			T587	4		T404	3		T722	1
values[31]	269	1			T587	3		T404	9		T722	1
values[32]	326	1			T587	6		T404	8		T722	1
values[33]	353	1			T587	9		T404	13		T722	1
values[34]	288	1			T587	22		T404	7		T722	1
values[35]	312	1			T587	17		T404	6		T722	1
values[36]	266	1			T587	4		T404	4		T722	1
values[37]	333	1			T587	4		T404	8		T722	1
values[38]	319	1			T587	9		T404	4		T722	1
values[39]	287	1			T587	3		T404	3		T722	1
values[40]	298	1			T587	8		T404	3		T722	1
values[41]	350	1			T587	5		T404	8		T722	1
values[42]	316	1			T587	4		T404	18		T722	1
values[43]	314	1			T587	7		T404	6		T722	1
values[44]	274	1			T587	7		T404	4		T722	1
values[45]	238	1			T587	4		T404	6		T722	1
values[46]	297	1			T404	4		T722	1		T441	13
values[47]	277	1			T404	5		T722	1		T441	4
values[48]	306	1			T404	11		T722	1		T441	2
values[49]	258	1			T404	4		T722	1		T441	8
values[50]	290	1			T404	9		T722	1		T441	7
values[51]	261	1			T404	6		T722	1		T441	4
values[52]	315	1			T404	3		T722	1		T441	17
values[53]	280	1			T404	34		T722	1		T441	5
values[54]	310	1			T404	9		T722	1		T428	3
values[55]	210	1			T404	3		T722	1		T428	11
values[56]	263	1			T404	14		T722	1		T428	5
values[57]	231	1			T404	8		T722	1		T428	11
values[58]	214	1			T404	3		T722	1		T428	3
values[59]	193	1			T404	3		T722	1		T428	3
values[60]	220	1			T404	3		T722	1		T428	7
values[61]	186	1			T404	6		T722	1		T428	6
values[62]	159	1			T404	9		T722	1		T428	5
values[63]	163	1			T722	1		T428	8		T767	9
values[64]	156	1			T722	1		T428	11		T767	3
values[65]	174	1			T722	1		T428	5		T767	8
values[66]	152	1			T722	1		T428	10		T767	5
values[67]	114	1			T722	1		T767	9		T768	1
values[68]	129	1			T722	1		T767	5		T768	1
values[69]	110	1			T722	1		T767	4		T768	1
values[70]	123	1			T722	1		T767	2		T768	1
values[71]	147	1			T722	1		T767	4		T768	1
values[72]	117	1			T722	1		T767	14		T768	1
values[73]	124	1			T722	1		T767	9		T768	1
values[74]	92	1			T722	1		T767	6		T768	1
values[75]	88	1			T722	1		T767	3		T768	1
values[76]	81	1			T722	1		T768	1		T764	2
values[77]	78	1			T722	1		T768	1		T764	1
values[78]	90	1			T722	1		T768	1		T764	2
values[79]	81	1			T722	1		T768	1		T764	8
values[80]	97	1			T722	1		T768	1		T764	1
values[81]	105	1			T722	1		T768	1		T764	5
values[82]	87	1			T722	1		T768	1		T764	1
values[83]	68	1			T722	1		T768	1		T764	2
values[84]	76	1			T722	1		T768	1		T764	2
values[85]	80	1			T722	1		T768	1		T764	3
values[86]	73	1			T722	1		T768	2		T764	1
values[87]	71	1			T722	1		T768	1		T764	3
values[88]	61	1			T722	1		T768	2		T764	3
values[89]	87	1			T722	1		T768	1		T764	3
values[90]	73	1			T722	1		T768	1		T764	3
values[91]	83	1			T722	1		T768	1		T764	3
values[92]	80	1			T722	1		T768	1		T764	1
values[93]	116	1			T722	1		T768	2		T764	1
values[94]	99	1			T722	1		T768	2		T764	7
values[95]	74	1			T722	1		T768	1		T764	2
values[96]	80	1			T722	1		T768	2		T764	5
values[97]	72	1			T722	1		T768	3		T764	1
values[98]	87	1			T722	1		T768	2		T764	2
values[99]	72	1			T722	1		T768	3		T764	1
values[100]	78	1			T722	1		T768	6		T764	4
values[101]	76	1			T722	1		T768	2		T764	5
values[102]	68	1			T722	1		T768	6		T764	4
values[103]	81	1			T722	1		T768	3		T764	1
values[104]	117	1			T722	1		T768	1		T764	6
values[105]	86	1			T722	1		T768	3		T764	2
values[106]	70	1			T722	1		T768	1		T764	1
values[107]	80	1			T722	1		T768	5		T764	2
values[108]	63	1			T722	1		T768	1		T764	3
values[109]	79	1			T722	1		T768	3		T764	3
values[110]	79	1			T722	1		T768	1		T764	1
values[111]	70	1			T722	1		T768	1		T764	1
values[112]	71	1			T722	2		T768	1		T764	1
values[113]	80	1			T722	3		T768	1		T764	1
values[114]	74	1			T722	1		T768	3		T764	1
values[115]	63	1			T722	1		T768	3		T764	5
values[116]	58	1			T722	1		T768	1		T764	2
values[117]	46	1			T722	2		T768	1		T764	1
values[118]	51	1			T722	1		T768	1		T764	1
values[119]	51	1			T722	1		T768	1		T764	1
values[120]	60	1			T722	2		T768	2		T764	2
values[121]	45	1			T722	1		T768	3		T764	3
values[122]	53	1			T722	2		T768	2		T764	2
values[123]	56	1			T722	1		T768	1		T764	2
values[124]	55	1			T722	2		T768	2		T764	3
values[125]	94	1			T722	2		T768	1		T764	1
values[126]	123	1			T722	1		T768	1		T764	3
values[127]	764	1			T722	29		T768	38		T764	42
values[128]	4917	1			T722	390		T768	323		T764	259