Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart3_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139086	1			T62	56		T63	21		T64	23
values[2]	9295	1			T63	2		T242	2		T241	1
values[3]	3674	1			T480	10		T721	24		T403	8
values[4]	2193	1			T480	6		T721	7		T403	10
values[5]	1401	1			T480	6		T721	2		T403	6
values[6]	996	1			T480	5		T721	2		T403	11
values[7]	737	1			T480	5		T721	1		T403	9
values[8]	592	1			T480	6		T403	2		T404	24
values[9]	495	1			T480	9		T403	5		T404	9
values[10]	499	1			T480	8		T403	11		T404	16
values[11]	392	1			T480	7		T403	10		T404	6
values[12]	398	1			T480	12		T403	9		T404	11
values[13]	403	1			T480	3		T403	4		T404	7
values[14]	381	1			T480	7		T403	4		T404	21
values[15]	361	1			T480	9		T403	4		T404	24
values[16]	394	1			T480	5		T403	12		T404	16
values[17]	369	1			T480	4		T403	3		T404	11
values[18]	328	1			T480	3		T403	6		T404	13
values[19]	410	1			T480	12		T403	28		T404	18
values[20]	371	1			T480	9		T403	4		T404	29
values[21]	392	1			T480	15		T403	10		T404	7
values[22]	353	1			T480	8		T403	3		T404	7
values[23]	409	1			T480	5		T403	5		T404	24
values[24]	348	1			T480	7		T403	9		T404	14
values[25]	353	1			T480	3		T403	6		T404	17
values[26]	348	1			T480	6		T403	15		T404	12
values[27]	365	1			T480	27		T403	4		T404	10
values[28]	311	1			T480	10		T403	7		T404	8
values[29]	366	1			T480	4		T403	3		T404	19
values[30]	317	1			T480	4		T403	9		T404	17
values[31]	332	1			T480	7		T403	5		T404	33
values[32]	328	1			T480	3		T403	7		T404	14
values[33]	364	1			T480	7		T403	14		T404	12
values[34]	319	1			T480	4		T403	7		T404	6
values[35]	316	1			T480	3		T403	8		T404	9
values[36]	291	1			T480	11		T403	11		T404	9
values[37]	303	1			T480	15		T403	6		T404	11
values[38]	382	1			T480	17		T403	11		T404	19
values[39]	347	1			T480	6		T403	5		T404	29
values[40]	375	1			T480	6		T403	11		T404	23
values[41]	406	1			T480	9		T403	4		T404	22
values[42]	288	1			T480	9		T403	4		T404	10
values[43]	354	1			T480	2		T403	5		T404	9
values[44]	288	1			T480	12		T403	7		T404	14
values[45]	285	1			T480	7		T403	9		T404	15
values[46]	277	1			T480	8		T403	10		T404	5
values[47]	355	1			T480	7		T403	7		T404	15
values[48]	310	1			T480	13		T403	7		T404	15
values[49]	315	1			T480	9		T403	6		T404	20
values[50]	328	1			T480	18		T403	3		T404	12
values[51]	291	1			T480	6		T403	2		T404	8
values[52]	320	1			T480	3		T404	17		T406	16
values[53]	300	1			T480	7		T404	15		T406	14
values[54]	336	1			T480	2		T404	25		T406	6
values[55]	283	1			T480	5		T404	10		T406	7
values[56]	274	1			T480	7		T404	16		T406	4
values[57]	315	1			T480	13		T404	13		T406	5
values[58]	331	1			T480	8		T404	21		T406	14
values[59]	248	1			T480	2		T404	6		T406	6
values[60]	229	1			T480	7		T404	9		T406	5
values[61]	256	1			T480	25		T404	15		T406	6
values[62]	313	1			T480	10		T404	19		T406	3
values[63]	264	1			T480	9		T404	15		T406	4
values[64]	260	1			T480	3		T404	18		T406	5
values[65]	209	1			T480	5		T404	1		T406	8
values[66]	203	1			T480	9		T406	9		T722	1
values[67]	155	1			T480	5		T406	5		T722	1
values[68]	132	1			T406	4		T722	1		T415	6
values[69]	128	1			T406	6		T722	1		T415	2
values[70]	135	1			T406	6		T722	1		T415	5
values[71]	131	1			T406	13		T722	1		T415	7
values[72]	117	1			T406	8		T722	1		T415	4
values[73]	138	1			T406	15		T722	2		T415	8
values[74]	61	1			T722	1		T415	2		T739	2
values[75]	55	1			T722	1		T415	1		T739	1
values[76]	51	1			T722	1		T415	3		T739	1
values[77]	46	1			T722	1		T415	3		T739	1
values[78]	72	1			T722	1		T415	4		T739	1
values[79]	61	1			T722	2		T415	3		T739	1
values[80]	50	1			T722	1		T415	1		T739	1
values[81]	59	1			T722	6		T415	2		T739	1
values[82]	81	1			T722	16		T415	3		T739	1
values[83]	69	1			T722	3		T415	3		T739	1
values[84]	49	1			T722	3		T415	4		T739	1
values[85]	45	1			T722	1		T415	2		T739	2
values[86]	61	1			T722	5		T415	8		T739	7
values[87]	59	1			T722	4		T415	4		T739	5
values[88]	61	1			T722	3		T415	2		T739	2
values[89]	93	1			T722	6		T415	4		T739	1
values[90]	58	1			T722	2		T415	2		T739	3
values[91]	46	1			T722	2		T415	5		T739	4
values[92]	59	1			T722	4		T415	4		T739	4
values[93]	81	1			T722	9		T415	5		T739	5
values[94]	86	1			T722	1		T415	7		T739	14
values[95]	66	1			T722	1		T415	6		T739	2
values[96]	68	1			T722	3		T415	4		T739	1
values[97]	76	1			T722	1		T415	4		T739	2
values[98]	64	1			T722	1		T415	9		T739	3
values[99]	56	1			T722	5		T415	3		T739	5
values[100]	57	1			T722	1		T415	2		T739	6
values[101]	59	1			T722	1		T415	3		T739	3
values[102]	56	1			T722	1		T415	3		T739	6
values[103]	57	1			T722	1		T415	10		T739	3
values[104]	60	1			T722	1		T415	12		T739	1
values[105]	50	1			T722	1		T415	5		T739	1
values[106]	74	1			T722	2		T415	10		T739	2
values[107]	54	1			T722	2		T415	5		T739	1
values[108]	52	1			T722	2		T415	3		T739	1
values[109]	62	1			T722	1		T415	2		T739	2
values[110]	63	1			T722	1		T415	6		T739	1
values[111]	44	1			T722	1		T415	2		T739	1
values[112]	50	1			T722	3		T415	2		T739	1
values[113]	49	1			T722	1		T415	2		T739	1
values[114]	57	1			T722	1		T415	2		T739	3
values[115]	45	1			T722	1		T415	1		T739	1
values[116]	51	1			T722	1		T415	1		T739	3
values[117]	53	1			T722	1		T415	4		T739	2
values[118]	45	1			T722	1		T415	6		T739	2
values[119]	44	1			T722	3		T415	5		T739	1
values[120]	50	1			T722	1		T415	1		T739	1
values[121]	42	1			T722	1		T415	2		T739	1
values[122]	34	1			T722	2		T415	1		T739	5
values[123]	33	1			T722	1		T415	1		T739	1
values[124]	34	1			T722	1		T415	3		T739	2
values[125]	70	1			T722	2		T415	5		T739	1
values[126]	86	1			T722	1		T415	4		T739	1
values[127]	662	1			T722	22		T415	5		T739	21
values[128]	5681	1			T722	286		T415	3		T739	255