Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	144565	1			T62	66		T63	11		T64	16
values[2]	9718	1			T241	1		T488	1		T483	4
values[3]	4600	1			T480	13		T492	30		T389	45
values[4]	2745	1			T480	12		T492	42		T389	21
values[5]	1811	1			T480	11		T492	39		T389	1
values[6]	1267	1			T480	9		T492	38		T587	20
values[7]	1080	1			T480	5		T492	17		T587	20
values[8]	940	1			T480	6		T492	15		T587	37
values[9]	907	1			T480	15		T492	25		T587	29
values[10]	800	1			T480	5		T492	24		T587	38
values[11]	789	1			T480	23		T492	16		T587	23
values[12]	709	1			T480	8		T492	12		T587	31
values[13]	794	1			T480	10		T492	16		T587	31
values[14]	700	1			T480	10		T492	6		T587	35
values[15]	665	1			T480	8		T492	5		T587	26
values[16]	688	1			T480	11		T492	11		T587	21
values[17]	756	1			T480	21		T492	14		T587	30
values[18]	697	1			T480	10		T492	12		T587	34
values[19]	696	1			T480	13		T492	6		T587	15
values[20]	719	1			T480	6		T492	15		T587	22
values[21]	676	1			T480	7		T492	15		T587	21
values[22]	603	1			T480	3		T492	8		T587	19
values[23]	603	1			T480	13		T492	3		T587	14
values[24]	621	1			T480	7		T492	5		T587	22
values[25]	653	1			T480	19		T492	4		T587	22
values[26]	623	1			T480	21		T492	5		T587	11
values[27]	581	1			T480	13		T492	6		T587	33
values[28]	595	1			T480	7		T492	52		T587	32
values[29]	494	1			T480	7		T492	8		T587	14
values[30]	499	1			T480	8		T492	5		T587	14
values[31]	604	1			T480	14		T492	8		T587	22
values[32]	549	1			T480	8		T492	7		T587	16
values[33]	535	1			T480	8		T492	10		T587	24
values[34]	544	1			T480	14		T492	13		T587	14
values[35]	496	1			T480	9		T492	10		T587	18
values[36]	563	1			T480	11		T492	12		T587	20
values[37]	452	1			T480	18		T492	16		T587	14
values[38]	482	1			T480	8		T492	7		T587	25
values[39]	459	1			T480	6		T492	8		T587	33
values[40]	469	1			T480	11		T492	9		T587	38
values[41]	426	1			T480	5		T492	10		T587	28
values[42]	453	1			T480	5		T492	6		T587	15
values[43]	560	1			T480	8		T492	26		T587	15
values[44]	543	1			T480	8		T492	18		T587	11
values[45]	425	1			T480	10		T492	11		T587	12
values[46]	401	1			T480	7		T492	9		T587	10
values[47]	387	1			T480	5		T587	4		T747	5
values[48]	442	1			T480	6		T587	5		T747	3
values[49]	394	1			T480	4		T587	12		T747	2
values[50]	268	1			T587	4		T747	2		T722	1
values[51]	241	1			T747	2		T722	1		T733	12
values[52]	162	1			T747	2		T722	1		T733	10
values[53]	124	1			T747	5		T722	1		T742	1
values[54]	75	1			T747	2		T722	1		T742	1
values[55]	74	1			T747	5		T722	1		T742	1
values[56]	66	1			T747	3		T722	1		T742	1
values[57]	83	1			T747	7		T722	1		T742	1
values[58]	107	1			T747	3		T722	1		T742	1
values[59]	73	1			T747	4		T722	1		T742	1
values[60]	79	1			T747	4		T722	1		T742	1
values[61]	61	1			T747	2		T722	1		T742	1
values[62]	65	1			T747	3		T722	1		T742	1
values[63]	65	1			T747	5		T722	1		T742	1
values[64]	76	1			T747	6		T722	1		T742	1
values[65]	70	1			T747	4		T722	1		T742	1
values[66]	73	1			T747	1		T722	1		T742	1
values[67]	85	1			T747	10		T722	1		T742	1
values[68]	80	1			T747	10		T722	1		T742	1
values[69]	65	1			T747	5		T722	1		T742	1
values[70]	61	1			T747	3		T722	1		T742	1
values[71]	53	1			T747	6		T722	1		T742	1
values[72]	69	1			T747	3		T722	1		T742	1
values[73]	61	1			T747	2		T722	1		T742	1
values[74]	48	1			T747	2		T722	1		T742	1
values[75]	71	1			T747	1		T722	1		T742	1
values[76]	77	1			T747	2		T722	1		T742	1
values[77]	69	1			T747	1		T722	1		T742	1
values[78]	97	1			T747	1		T722	1		T742	1
values[79]	91	1			T747	2		T722	1		T742	1
values[80]	54	1			T747	1		T722	1		T742	1
values[81]	67	1			T747	1		T722	1		T742	1
values[82]	61	1			T747	2		T722	1		T742	1
values[83]	66	1			T747	3		T722	1		T742	1
values[84]	45	1			T747	4		T722	1		T742	1
values[85]	53	1			T747	4		T722	1		T742	1
values[86]	68	1			T747	11		T722	1		T742	1
values[87]	68	1			T747	7		T722	1		T742	1
values[88]	52	1			T747	8		T722	1		T742	1
values[89]	58	1			T747	2		T722	2		T742	1
values[90]	51	1			T747	4		T722	1		T742	1
values[91]	50	1			T747	3		T722	1		T742	1
values[92]	45	1			T747	3		T722	1		T742	1
values[93]	46	1			T747	3		T722	1		T742	1
values[94]	46	1			T747	3		T722	1		T742	1
values[95]	46	1			T747	6		T722	1		T742	1
values[96]	49	1			T747	1		T722	1		T742	1
values[97]	39	1			T747	3		T722	1		T742	1
values[98]	33	1			T747	1		T722	1		T742	1
values[99]	36	1			T722	2		T742	3		T455	1
values[100]	38	1			T722	1		T742	6		T455	3
values[101]	36	1			T722	1		T742	4		T455	2
values[102]	42	1			T722	1		T742	1		T455	3
values[103]	52	1			T722	2		T742	1		T455	6
values[104]	59	1			T722	3		T742	2		T455	8
values[105]	50	1			T722	7		T742	2		T455	3
values[106]	40	1			T722	2		T742	4		T455	4
values[107]	45	1			T722	2		T742	6		T455	9
values[108]	44	1			T722	2		T742	3		T455	4
values[109]	61	1			T722	1		T742	5		T455	5
values[110]	45	1			T722	1		T742	3		T455	6
values[111]	40	1			T722	3		T742	2		T455	1
values[112]	47	1			T722	2		T742	2		T736	5
values[113]	41	1			T722	2		T742	2		T736	1
values[114]	54	1			T722	1		T742	3		T736	1
values[115]	47	1			T722	3		T742	2		T736	2
values[116]	54	1			T722	2		T742	2		T736	3
values[117]	50	1			T722	1		T742	3		T736	1
values[118]	41	1			T722	2		T742	1		T736	2
values[119]	36	1			T722	2		T742	1		T736	4
values[120]	45	1			T722	4		T742	1		T736	4
values[121]	35	1			T722	1		T742	3		T736	1
values[122]	47	1			T722	1		T742	6		T736	3
values[123]	25	1			T722	1		T742	1		T736	1
values[124]	25	1			T722	1		T742	1		T736	1
values[125]	25	1			T722	1		T742	3		T736	1
values[126]	84	1			T722	5		T742	5		T736	9
values[127]	861	1			T722	55		T742	54		T736	59
values[128]	3990	1			T722	248		T742	276		T736	208