CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 386678 | 1 | T62 | 1 | T64 | 1 | T105 | 20 | ||||
rising | 386767 | 1 | T62 | 1 | T64 | 1 | T105 | 20 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1094746 | 1 | T62 | 2 | T64 | 2 | T105 | 46 | ||||
auto[1] | 9649303 | 1 | T62 | 4974 | T63 | 238 | T64 | 10000 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 339224 | 1 | T62 | 2 | T64 | 2 | T105 | 32 | ||||
rising | 339328 | 1 | T62 | 2 | T64 | 2 | T105 | 33 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1212767 | 1 | T62 | 4 | T64 | 4 | T105 | 70 | ||||
auto[1] | 10376321 | 1 | T62 | 4854 | T63 | 300 | T64 | 9282 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 688768 | 1 | T64 | 2 | T105 | 53 | T66 | 2 | ||||
rising | 688860 | 1 | T62 | 1 | T64 | 2 | T105 | 53 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1102028 | 1 | T62 | 2 | T64 | 2 | T105 | 63 | ||||
auto[1] | 9732502 | 1 | T62 | 5030 | T63 | 378 | T64 | 9080 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7607 | 1 | T64 | 101 | T66 | 1 | T234 | 83 | ||||
rising | 7651 | 1 | T64 | 102 | T66 | 1 | T234 | 83 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178225 | 1 | T62 | 113 | T63 | 9 | T64 | 248 | ||||
auto[1] | 16435 | 1 | T64 | 237 | T66 | 1 | T234 | 108 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5848 | 1 | T395 | 24 | T696 | 1 | T484 | 5 | ||||
rising | 5877 | 1 | T395 | 24 | T696 | 1 | T484 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185071 | 1 | T62 | 95 | T63 | 4 | T105 | 2 | ||||
auto[1] | 9069 | 1 | T395 | 25 | T696 | 1 | T484 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3372 | 1 | T62 | 2 | T66 | 13 | T395 | 2 | ||||
rising | 3400 | 1 | T62 | 2 | T66 | 13 | T395 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 187072 | 1 | T62 | 124 | T63 | 6 | T105 | 2 | ||||
auto[1] | 3695 | 1 | T62 | 2 | T66 | 14 | T395 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8323 | 1 | T62 | 2 | T66 | 24 | T234 | 102 | ||||
rising | 8375 | 1 | T62 | 2 | T66 | 24 | T234 | 102 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168516 | 1 | T62 | 103 | T63 | 4 | T105 | 1 | ||||
auto[1] | 24747 | 1 | T62 | 2 | T66 | 27 | T234 | 177 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4107 | 1 | T234 | 6 | T395 | 1 | T484 | 5 | ||||
rising | 4127 | 1 | T234 | 6 | T395 | 1 | T484 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185147 | 1 | T62 | 81 | T63 | 4 | T105 | 3 | ||||
auto[1] | 4643 | 1 | T234 | 7 | T395 | 1 | T484 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6888 | 1 | T63 | 1 | T66 | 20 | T234 | 5 | ||||
rising | 6937 | 1 | T63 | 1 | T66 | 20 | T234 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175964 | 1 | T62 | 78 | T63 | 8 | T105 | 2 | ||||
auto[1] | 13043 | 1 | T63 | 1 | T66 | 24 | T234 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5544 | 1 | T62 | 3 | T395 | 2 | T696 | 1 | ||||
rising | 5581 | 1 | T62 | 3 | T395 | 2 | T696 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185574 | 1 | T62 | 93 | T63 | 8 | T105 | 2 | ||||
auto[1] | 12182 | 1 | T62 | 3 | T395 | 3 | T696 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5657 | 1 | T62 | 1 | T395 | 4 | T484 | 3 | ||||
rising | 5694 | 1 | T62 | 1 | T395 | 4 | T484 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175017 | 1 | T62 | 112 | T63 | 3 | T105 | 3 | ||||
auto[1] | 12404 | 1 | T62 | 1 | T395 | 4 | T484 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5682 | 1 | T62 | 1 | T64 | 40 | T66 | 35 | ||||
rising | 5725 | 1 | T62 | 1 | T64 | 40 | T66 | 35 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183854 | 1 | T62 | 87 | T63 | 6 | T64 | 453 | ||||
auto[1] | 11917 | 1 | T62 | 1 | T64 | 46 | T66 | 41 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5269 | 1 | T62 | 2 | T64 | 116 | T66 | 1 | ||||
rising | 5303 | 1 | T62 | 2 | T64 | 117 | T66 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183274 | 1 | T62 | 88 | T63 | 7 | T64 | 343 | ||||
auto[1] | 8275 | 1 | T62 | 2 | T64 | 226 | T66 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5438 | 1 | T62 | 2 | T395 | 14 | T484 | 4 | ||||
rising | 5465 | 1 | T62 | 2 | T395 | 14 | T484 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 190054 | 1 | T62 | 112 | T63 | 5 | T105 | 1 | ||||
auto[1] | 7180 | 1 | T62 | 2 | T395 | 14 | T484 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 15554 | 1 | T62 | 14 | T64 | 20 | T66 | 26 | ||||
rising | 15575 | 1 | T62 | 14 | T64 | 20 | T66 | 26 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1498788 | 1 | T62 | 684 | T63 | 48 | T64 | 983 | ||||
auto[1] | 16229 | 1 | T62 | 15 | T64 | 20 | T66 | 26 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5467 | 1 | T62 | 7 | T64 | 37 | T395 | 233 | ||||
rising | 5514 | 1 | T62 | 7 | T64 | 37 | T395 | 233 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188358 | 1 | T62 | 106 | T63 | 6 | T64 | 427 | ||||
auto[1] | 11778 | 1 | T62 | 7 | T64 | 47 | T395 | 592 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8323 | 1 | T64 | 24 | T66 | 22 | T395 | 86 | ||||
rising | 8371 | 1 | T64 | 24 | T66 | 22 | T395 | 86 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 176883 | 1 | T62 | 107 | T63 | 3 | T64 | 483 | ||||
auto[1] | 25735 | 1 | T64 | 27 | T66 | 27 | T395 | 293 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2579 | 1 | T62 | 2 | T395 | 2 | T484 | 6 | ||||
rising | 2597 | 1 | T62 | 2 | T395 | 2 | T484 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188144 | 1 | T62 | 93 | T63 | 11 | T105 | 1 | ||||
auto[1] | 2722 | 1 | T62 | 2 | T395 | 2 | T484 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8354 | 1 | T234 | 2 | T395 | 12 | T484 | 8 | ||||
rising | 8395 | 1 | T234 | 2 | T395 | 12 | T484 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181134 | 1 | T62 | 106 | T63 | 5 | T105 | 1 | ||||
auto[1] | 16964 | 1 | T234 | 2 | T395 | 12 | T484 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7861 | 1 | T66 | 60 | T234 | 2 | T395 | 4 | ||||
rising | 7910 | 1 | T66 | 61 | T234 | 2 | T395 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 176509 | 1 | T62 | 90 | T63 | 2 | T72 | 8 | ||||
auto[1] | 15350 | 1 | T66 | 94 | T234 | 2 | T395 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7037 | 1 | T62 | 2 | T234 | 2 | T395 | 1 | ||||
rising | 7091 | 1 | T62 | 2 | T234 | 2 | T395 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 170805 | 1 | T62 | 103 | T63 | 8 | T105 | 2 | ||||
auto[1] | 13535 | 1 | T62 | 2 | T234 | 2 | T395 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5950 | 1 | T62 | 2 | T64 | 94 | T395 | 3 | ||||
rising | 5985 | 1 | T62 | 2 | T64 | 94 | T395 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182305 | 1 | T62 | 88 | T63 | 9 | T64 | 314 | ||||
auto[1] | 9394 | 1 | T62 | 3 | T64 | 165 | T395 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2528 | 1 | T62 | 6 | T395 | 3 | T484 | 9 | ||||
rising | 2547 | 1 | T62 | 6 | T395 | 3 | T484 | 9 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183558 | 1 | T62 | 108 | T63 | 12 | T105 | 8 | ||||
auto[1] | 2680 | 1 | T62 | 6 | T395 | 3 | T484 | 9 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6543 | 1 | T62 | 2 | T395 | 120 | T696 | 1 | ||||
rising | 6577 | 1 | T62 | 2 | T395 | 120 | T696 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178943 | 1 | T62 | 99 | T63 | 2 | T105 | 3 | ||||
auto[1] | 9474 | 1 | T62 | 2 | T395 | 205 | T696 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 41254 | 1 | T65 | 1126 | T631 | 24 | T505 | 552 | ||||
rising | 41267 | 1 | T65 | 1127 | T631 | 24 | T505 | 552 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 89425 | 1 | T65 | 2627 | T631 | 139 | T505 | 1212 | ||||
auto[1] | 80431 | 1 | T65 | 2205 | T631 | 39 | T505 | 1064 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 23628 | 1 | T65 | 713 | T631 | 39 | T505 | 314 | ||||
rising | 23628 | 1 | T65 | 713 | T631 | 39 | T505 | 314 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 140402 | 1 | T65 | 3867 | T631 | 118 | T505 | 1866 | ||||
auto[1] | 29454 | 1 | T65 | 965 | T631 | 60 | T505 | 410 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 23628 | 1 | T65 | 713 | T631 | 39 | T505 | 314 | ||||
rising | 23628 | 1 | T65 | 713 | T631 | 39 | T505 | 314 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 140402 | 1 | T65 | 3867 | T631 | 118 | T505 | 1866 | ||||
auto[1] | 29454 | 1 | T65 | 965 | T631 | 60 | T505 | 410 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4209 | 1 | T65 | 175 | T631 | 33 | T505 | 56 | ||||
rising | 4201 | 1 | T65 | 175 | T631 | 33 | T505 | 56 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 163877 | 1 | T65 | 4521 | T631 | 126 | T505 | 2205 | ||||
auto[1] | 5979 | 1 | T65 | 311 | T631 | 52 | T505 | 71 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 83946 | 1 | T179 | 204 | T182 | 332 | T180 | 578 | ||||
rising | 83967 | 1 | T179 | 204 | T182 | 332 | T180 | 578 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 27695619 | 1 | T1 | 8708 | T2 | 15609 | T3 | 6597 | ||||
auto[1] | 495348 | 1 | T179 | 264 | T182 | 445 | T180 | 737 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 41839 | 1 | T65 | 1176 | T631 | 36 | T505 | 586 | ||||
rising | 41842 | 1 | T65 | 1175 | T631 | 37 | T505 | 586 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 90029 | 1 | T65 | 2594 | T631 | 126 | T505 | 1179 | ||||
auto[1] | 79827 | 1 | T65 | 2238 | T631 | 52 | T505 | 1097 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 35746 | 1 | T65 | 1028 | T631 | 35 | T505 | 486 | ||||
rising | 35750 | 1 | T65 | 1028 | T631 | 35 | T505 | 485 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 118619 | 1 | T65 | 3353 | T631 | 128 | T505 | 1589 | ||||
auto[1] | 51237 | 1 | T65 | 1479 | T631 | 50 | T505 | 687 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2391 | 1 | T62 | 2 | T64 | 25 | T395 | 4 | ||||
rising | 2409 | 1 | T62 | 2 | T64 | 25 | T395 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 194689 | 1 | T62 | 90 | T63 | 6 | T64 | 536 | ||||
auto[1] | 2520 | 1 | T62 | 2 | T64 | 25 | T395 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3034 | 1 | T66 | 3 | T234 | 5 | T395 | 29 | ||||
rising | 3053 | 1 | T66 | 3 | T234 | 5 | T395 | 29 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184242 | 1 | T62 | 95 | T63 | 6 | T105 | 2 | ||||
auto[1] | 3263 | 1 | T66 | 3 | T234 | 5 | T395 | 29 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5839 | 1 | T62 | 2 | T234 | 14 | T395 | 18 | ||||
rising | 5891 | 1 | T62 | 2 | T234 | 14 | T395 | 18 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168583 | 1 | T62 | 90 | T63 | 7 | T105 | 1 | ||||
auto[1] | 24393 | 1 | T62 | 2 | T234 | 16 | T395 | 20 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8004 | 1 | T62 | 2 | T234 | 1 | T395 | 13 | ||||
rising | 8051 | 1 | T62 | 2 | T234 | 1 | T395 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177875 | 1 | T62 | 111 | T63 | 10 | T72 | 8 | ||||
auto[1] | 23143 | 1 | T62 | 2 | T234 | 1 | T395 | 14 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3006 | 1 | T62 | 1 | T234 | 17 | T395 | 33 | ||||
rising | 3029 | 1 | T62 | 1 | T234 | 17 | T395 | 33 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 187594 | 1 | T62 | 106 | T63 | 9 | T105 | 1 | ||||
auto[1] | 3214 | 1 | T62 | 1 | T234 | 18 | T395 | 33 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7525 | 1 | T62 | 1 | T64 | 15 | T66 | 13 | ||||
rising | 7567 | 1 | T62 | 1 | T64 | 15 | T66 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169413 | 1 | T62 | 116 | T63 | 5 | T64 | 469 | ||||
auto[1] | 16393 | 1 | T62 | 1 | T64 | 19 | T66 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7383 | 1 | T105 | 1 | T395 | 85 | T484 | 7 | ||||
rising | 7411 | 1 | T105 | 1 | T395 | 85 | T484 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178153 | 1 | T62 | 77 | T63 | 5 | T105 | 69 | ||||
auto[1] | 14736 | 1 | T105 | 1 | T395 | 91 | T484 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7079 | 1 | T62 | 3 | T395 | 104 | T484 | 6 | ||||
rising | 7113 | 1 | T62 | 3 | T395 | 104 | T484 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185369 | 1 | T62 | 97 | T63 | 7 | T105 | 4 | ||||
auto[1] | 15238 | 1 | T62 | 3 | T395 | 271 | T484 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 22362 | 1 | T62 | 12 | T64 | 16 | T66 | 20 | ||||
rising | 22388 | 1 | T62 | 12 | T64 | 16 | T66 | 20 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1470120 | 1 | T62 | 682 | T63 | 47 | T64 | 1057 | ||||
auto[1] | 23400 | 1 | T62 | 12 | T64 | 16 | T66 | 20 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7459 | 1 | T234 | 14 | T395 | 3 | T484 | 3 | ||||
rising | 7500 | 1 | T234 | 14 | T395 | 3 | T484 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172540 | 1 | T62 | 96 | T63 | 4 | T72 | 11 | ||||
auto[1] | 14649 | 1 | T234 | 14 | T395 | 3 | T484 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4641 | 1 | T64 | 19 | T395 | 2 | T696 | 1 | ||||
rising | 4667 | 1 | T64 | 19 | T395 | 2 | T696 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 187558 | 1 | T62 | 87 | T63 | 6 | T64 | 471 | ||||
auto[1] | 7219 | 1 | T64 | 22 | T395 | 2 | T696 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 198924 | 1 | T105 | 11 | T66 | 540 | T234 | 3806 | ||||
rising | 198930 | 1 | T105 | 11 | T66 | 540 | T234 | 3806 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1790872 | 1 | T105 | 118 | T66 | 4763 | T234 | 34457 | ||||
auto[1] | 223910 | 1 | T105 | 12 | T66 | 617 | T234 | 4319 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 494516 | 1 | T105 | 30 | T66 | 1324 | T234 | 9509 | ||||
rising | 494531 | 1 | T105 | 30 | T66 | 1323 | T234 | 9508 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 894037 | 1 | T105 | 52 | T66 | 2357 | T234 | 17362 | ||||
auto[1] | 1120745 | 1 | T105 | 78 | T66 | 3023 | T234 | 21414 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 494516 | 1 | T105 | 30 | T66 | 1324 | T234 | 9509 | ||||
rising | 494531 | 1 | T105 | 30 | T66 | 1323 | T234 | 9508 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 894037 | 1 | T105 | 52 | T66 | 2357 | T234 | 17362 | ||||
auto[1] | 1120745 | 1 | T105 | 78 | T66 | 3023 | T234 | 21414 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |