Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.otp_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141082	1			T62	95		T63	6		T105	2
values[2]	9290	1			T66	163		T234	246		T395	218
values[3]	3277	1			T66	17		T234	45		T395	132
values[4]	2072	1			T66	2		T234	22		T395	82
values[5]	1330	1			T234	16		T395	38		T404	9
values[6]	905	1			T234	6		T395	19		T412	2
values[7]	594	1			T234	6		T395	11		T412	2
values[8]	408	1			T234	2		T412	2		T781	1
values[9]	368	1			T234	1		T412	2		T781	1
values[10]	331	1			T412	2		T781	1		T777	1
values[11]	319	1			T412	2		T781	1		T777	1
values[12]	267	1			T412	2		T781	1		T777	1
values[13]	246	1			T412	2		T781	1		T777	1
values[14]	245	1			T412	2		T781	1		T777	1
values[15]	266	1			T412	2		T781	1		T777	1
values[16]	274	1			T412	2		T781	1		T777	1
values[17]	294	1			T412	2		T781	1		T777	1
values[18]	234	1			T412	2		T781	1		T777	1
values[19]	223	1			T412	2		T781	1		T777	1
values[20]	217	1			T412	2		T781	1		T777	1
values[21]	228	1			T412	2		T781	1		T777	1
values[22]	316	1			T412	2		T781	1		T777	1
values[23]	263	1			T412	2		T781	1		T777	1
values[24]	251	1			T412	2		T781	1		T777	1
values[25]	235	1			T412	2		T781	1		T777	1
values[26]	196	1			T412	2		T781	1		T777	1
values[27]	235	1			T412	2		T781	1		T777	1
values[28]	250	1			T412	2		T781	1		T777	1
values[29]	229	1			T412	2		T781	1		T777	1
values[30]	233	1			T412	2		T781	1		T777	1
values[31]	221	1			T412	2		T781	1		T777	1
values[32]	224	1			T412	2		T781	1		T777	1
values[33]	233	1			T412	2		T781	1		T777	1
values[34]	196	1			T412	2		T781	1		T777	1
values[35]	233	1			T412	2		T781	1		T777	1
values[36]	214	1			T412	2		T781	1		T777	1
values[37]	241	1			T412	2		T781	1		T777	1
values[38]	243	1			T412	2		T781	1		T777	1
values[39]	201	1			T412	2		T781	1		T777	1
values[40]	282	1			T412	2		T781	1		T777	1
values[41]	221	1			T412	2		T781	1		T777	1
values[42]	296	1			T412	2		T781	1		T777	1
values[43]	216	1			T412	2		T781	1		T777	1
values[44]	215	1			T412	2		T781	1		T777	1
values[45]	214	1			T412	3		T781	1		T777	1
values[46]	175	1			T412	2		T781	1		T777	1
values[47]	221	1			T412	2		T781	1		T777	1
values[48]	229	1			T412	2		T781	1		T777	1
values[49]	194	1			T412	2		T781	1		T777	1
values[50]	218	1			T412	2		T781	1		T777	1
values[51]	206	1			T412	2		T781	1		T777	1
values[52]	199	1			T412	2		T781	1		T777	1
values[53]	183	1			T412	2		T781	1		T777	1
values[54]	204	1			T412	2		T781	1		T777	1
values[55]	197	1			T412	2		T781	1		T777	1
values[56]	204	1			T412	2		T781	1		T777	1
values[57]	206	1			T412	2		T781	1		T777	1
values[58]	158	1			T412	2		T781	1		T777	1
values[59]	203	1			T412	2		T781	1		T777	1
values[60]	182	1			T412	2		T781	1		T777	1
values[61]	194	1			T412	2		T781	1		T777	1
values[62]	171	1			T412	2		T781	1		T777	1
values[63]	202	1			T412	2		T781	1		T777	1
values[64]	150	1			T412	2		T781	1		T777	1
values[65]	174	1			T412	3		T781	1		T777	1
values[66]	206	1			T412	2		T781	1		T777	1
values[67]	129	1			T412	2		T781	1		T777	1
values[68]	141	1			T412	2		T781	1		T777	1
values[69]	136	1			T412	2		T781	1		T777	1
values[70]	124	1			T412	2		T781	1		T777	1
values[71]	128	1			T412	2		T781	1		T777	1
values[72]	145	1			T412	2		T781	1		T777	1
values[73]	162	1			T412	2		T781	1		T777	1
values[74]	100	1			T412	2		T781	1		T777	1
values[75]	100	1			T412	2		T781	1		T777	1
values[76]	91	1			T412	2		T781	1		T777	1
values[77]	88	1			T412	2		T781	1		T777	1
values[78]	68	1			T412	2		T781	1		T777	1
values[79]	70	1			T412	2		T781	1		T777	1
values[80]	89	1			T412	2		T781	1		T777	1
values[81]	84	1			T412	4		T781	1		T777	1
values[82]	72	1			T412	4		T781	2		T777	1
values[83]	84	1			T412	7		T781	1		T777	2
values[84]	70	1			T412	3		T781	1		T777	1
values[85]	87	1			T412	11		T781	1		T777	1
values[86]	73	1			T412	10		T781	1		T777	1
values[87]	86	1			T412	13		T781	1		T777	1
values[88]	70	1			T412	8		T781	1		T777	1
values[89]	69	1			T412	2		T781	1		T777	1
values[90]	76	1			T412	4		T781	1		T777	1
values[91]	73	1			T412	5		T781	1		T777	1
values[92]	78	1			T412	7		T781	1		T777	1
values[93]	70	1			T412	4		T781	1		T777	1
values[94]	98	1			T412	11		T781	1		T777	1
values[95]	93	1			T412	3		T781	1		T777	1
values[96]	86	1			T412	2		T781	1		T777	1
values[97]	106	1			T412	9		T781	1		T777	2
values[98]	74	1			T412	5		T781	1		T777	1
values[99]	86	1			T412	6		T781	1		T777	1
values[100]	77	1			T412	10		T781	1		T777	1
values[101]	92	1			T412	3		T781	1		T777	1
values[102]	101	1			T412	3		T781	1		T777	1
values[103]	88	1			T412	4		T781	1		T777	1
values[104]	100	1			T412	9		T781	1		T777	1
values[105]	70	1			T412	8		T781	1		T777	1
values[106]	61	1			T412	4		T781	1		T777	1
values[107]	87	1			T412	8		T781	1		T777	1
values[108]	77	1			T412	6		T781	1		T777	1
values[109]	88	1			T412	6		T781	1		T777	1
values[110]	68	1			T412	8		T781	1		T777	1
values[111]	61	1			T412	6		T781	1		T777	1
values[112]	72	1			T412	4		T781	1		T777	1
values[113]	68	1			T412	5		T781	1		T777	1
values[114]	85	1			T412	8		T781	2		T777	1
values[115]	87	1			T412	5		T781	3		T777	1
values[116]	72	1			T412	3		T781	4		T777	1
values[117]	61	1			T412	3		T781	1		T777	2
values[118]	77	1			T412	3		T781	2		T777	5
values[119]	73	1			T412	5		T781	1		T777	1
values[120]	77	1			T412	4		T781	1		T777	3
values[121]	82	1			T412	6		T781	2		T777	4
values[122]	82	1			T412	2		T781	3		T777	1
values[123]	65	1			T412	5		T781	1		T777	2
values[124]	70	1			T412	8		T781	2		T777	1
values[125]	81	1			T412	2		T781	2		T777	8
values[126]	116	1			T412	5		T781	2		T777	3
values[127]	960	1			T412	51		T781	36		T777	33
values[128]	9097	1			T412	541		T781	292		T777	362