Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_plic_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	194066	1			T62	100		T63	4		T105	2
values[2]	4492	1			T62	4		T66	39		T395	165
values[3]	1989	1			T66	11		T395	87		T455	22
values[4]	1432	1			T66	13		T395	36		T455	33
values[5]	1165	1			T66	34		T395	36		T455	16
values[6]	1009	1			T66	22		T395	46		T455	26
values[7]	890	1			T66	20		T395	31		T455	26
values[8]	822	1			T66	27		T395	32		T455	34
values[9]	791	1			T66	35		T395	46		T455	15
values[10]	674	1			T66	6		T395	44		T455	11
values[11]	603	1			T395	27		T455	15		T413	5
values[12]	576	1			T395	11		T455	3		T413	13
values[13]	520	1			T395	3		T413	9		T412	1
values[14]	449	1			T413	2		T412	1		T786	1
values[15]	399	1			T412	1		T786	1		T402	7
values[16]	352	1			T412	1		T786	1		T402	2
values[17]	328	1			T412	1		T786	1		T402	2
values[18]	309	1			T412	1		T786	1		T402	3
values[19]	277	1			T412	1		T786	1		T402	4
values[20]	259	1			T412	1		T786	1		T402	2
values[21]	188	1			T412	1		T786	1		T402	2
values[22]	229	1			T412	1		T786	1		T402	1
values[23]	249	1			T412	1		T786	1		T402	3
values[24]	261	1			T412	1		T786	1		T402	3
values[25]	184	1			T412	1		T786	1		T402	3
values[26]	208	1			T412	1		T786	1		T402	5
values[27]	165	1			T412	1		T786	1		T402	1
values[28]	146	1			T412	1		T786	1		T402	4
values[29]	131	1			T412	1		T786	1		T402	4
values[30]	115	1			T412	1		T786	1		T402	1
values[31]	112	1			T412	1		T786	1		T402	2
values[32]	81	1			T412	1		T786	1		T402	1
values[33]	68	1			T412	1		T786	1		T402	5
values[34]	78	1			T412	1		T786	1		T402	2
values[35]	66	1			T412	1		T786	2		T402	4
values[36]	74	1			T412	1		T786	1		T402	6
values[37]	73	1			T412	1		T786	1		T402	1
values[38]	85	1			T412	1		T786	1		T402	2
values[39]	86	1			T412	1		T786	1		T402	7
values[40]	72	1			T412	1		T786	1		T402	6
values[41]	46	1			T412	1		T786	1		T402	1
values[42]	60	1			T412	1		T786	1		T402	2
values[43]	60	1			T412	1		T786	1		T402	1
values[44]	57	1			T412	1		T786	1		T402	1
values[45]	42	1			T412	1		T786	1		T402	2
values[46]	52	1			T412	1		T786	1		T402	1
values[47]	46	1			T412	1		T786	1		T402	3
values[48]	59	1			T412	1		T786	1		T402	3
values[49]	69	1			T412	1		T786	1		T402	6
values[50]	45	1			T412	2		T786	1		T402	3
values[51]	48	1			T412	1		T786	1		T402	4
values[52]	42	1			T412	1		T786	1		T402	2
values[53]	50	1			T412	1		T786	1		T402	3
values[54]	38	1			T412	1		T786	1		T402	1
values[55]	49	1			T412	1		T786	1		T402	4
values[56]	47	1			T412	1		T786	1		T402	1
values[57]	49	1			T412	1		T786	1		T402	2
values[58]	53	1			T412	1		T786	1		T402	2
values[59]	53	1			T412	1		T786	1		T402	3
values[60]	50	1			T412	1		T786	1		T402	2
values[61]	43	1			T412	1		T786	1		T402	2
values[62]	43	1			T412	1		T786	1		T402	1
values[63]	49	1			T412	1		T786	1		T402	5
values[64]	53	1			T412	1		T786	1		T402	5
values[65]	53	1			T412	1		T786	1		T402	2
values[66]	45	1			T412	1		T786	1		T402	1
values[67]	49	1			T412	1		T786	1		T402	2
values[68]	61	1			T412	1		T786	1		T402	3
values[69]	62	1			T412	1		T786	1		T402	3
values[70]	50	1			T412	1		T786	1		T402	1
values[71]	51	1			T412	1		T786	1		T402	1
values[72]	71	1			T412	1		T786	1		T402	4
values[73]	65	1			T412	1		T786	1		T402	1
values[74]	60	1			T412	1		T786	1		T402	1
values[75]	57	1			T412	1		T786	1		T402	3
values[76]	48	1			T412	1		T786	1		T402	1
values[77]	60	1			T412	1		T786	1		T402	8
values[78]	52	1			T412	1		T786	1		T402	8
values[79]	48	1			T412	1		T786	1		T402	1
values[80]	53	1			T412	1		T786	1		T402	4
values[81]	62	1			T412	1		T786	1		T402	2
values[82]	56	1			T412	1		T786	1		T402	3
values[83]	48	1			T412	1		T786	1		T402	2
values[84]	53	1			T412	1		T786	1		T402	1
values[85]	59	1			T412	1		T786	1		T402	1
values[86]	68	1			T412	1		T786	1		T402	3
values[87]	58	1			T412	1		T786	1		T402	2
values[88]	67	1			T412	1		T786	1		T402	5
values[89]	69	1			T412	1		T786	1		T402	5
values[90]	79	1			T412	1		T786	1		T402	6
values[91]	79	1			T412	1		T786	1		T402	7
values[92]	62	1			T412	1		T786	1		T402	4
values[93]	62	1			T412	1		T786	1		T402	1
values[94]	72	1			T412	1		T786	1		T402	2
values[95]	71	1			T412	1		T786	1		T402	2
values[96]	74	1			T412	1		T786	1		T402	5
values[97]	73	1			T412	1		T786	1		T402	5
values[98]	88	1			T412	1		T786	1		T402	1
values[99]	70	1			T412	1		T786	1		T402	2
values[100]	56	1			T412	1		T786	1		T402	5
values[101]	67	1			T412	1		T786	1		T402	2
values[102]	74	1			T412	1		T786	1		T402	10
values[103]	77	1			T412	1		T786	1		T402	9
values[104]	76	1			T412	1		T786	1		T402	3
values[105]	89	1			T412	1		T786	1		T402	3
values[106]	86	1			T412	1		T786	1		T402	6
values[107]	75	1			T412	1		T786	1		T402	5
values[108]	82	1			T412	1		T786	1		T402	5
values[109]	85	1			T412	1		T786	1		T402	3
values[110]	81	1			T412	1		T786	1		T402	3
values[111]	75	1			T412	1		T786	1		T402	4
values[112]	63	1			T412	1		T786	1		T402	6
values[113]	78	1			T412	1		T786	1		T402	1
values[114]	72	1			T412	1		T786	1		T402	1
values[115]	87	1			T412	1		T786	1		T402	3
values[116]	81	1			T412	1		T786	1		T402	7
values[117]	73	1			T412	1		T786	1		T402	5
values[118]	80	1			T412	1		T786	1		T402	10
values[119]	89	1			T412	2		T786	1		T402	9
values[120]	90	1			T412	1		T786	1		T402	7
values[121]	81	1			T412	3		T786	1		T402	6
values[122]	106	1			T412	2		T786	1		T402	7
values[123]	137	1			T412	1		T786	1		T402	4
values[124]	198	1			T412	2		T786	1		T402	6
values[125]	394	1			T412	1		T786	2		T402	28
values[126]	683	1			T412	10		T786	16		T402	37
values[127]	2056	1			T412	136		T786	137		T402	22
values[128]	3737	1			T412	260		T786	309		T402	2