Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	150202	1			T62	104		T63	4		T64	21
values[2]	11985	1			T62	3		T64	24		T66	211
values[3]	5806	1			T64	13		T66	96		T404	97
values[4]	2475	1			T64	5		T66	18		T404	41
values[5]	862	1			T64	12		T66	2		T404	4
values[6]	470	1			T64	12		T782	1		T419	20
values[7]	294	1			T64	7		T782	1		T419	10
values[8]	246	1			T64	18		T782	1		T802	28
values[9]	216	1			T64	16		T782	1		T802	16
values[10]	244	1			T64	14		T782	1		T802	12
values[11]	214	1			T64	16		T782	1		T802	4
values[12]	125	1			T64	8		T782	1		T803	19
values[13]	107	1			T64	7		T782	1		T803	30
values[14]	93	1			T64	8		T782	1		T803	22
values[15]	93	1			T64	16		T782	1		T803	16
values[16]	102	1			T64	19		T782	1		T803	15
values[17]	87	1			T64	18		T782	1		T803	1
values[18]	57	1			T64	7		T782	1		T803	6
values[19]	78	1			T64	18		T782	1		T803	8
values[20]	81	1			T64	20		T782	1		T803	4
values[21]	95	1			T64	27		T782	1		T803	12
values[22]	79	1			T64	25		T782	1		T803	11
values[23]	71	1			T64	10		T782	1		T803	5
values[24]	56	1			T64	7		T782	1		T803	1
values[25]	58	1			T64	9		T782	1		T803	2
values[26]	85	1			T64	11		T782	1		T803	3
values[27]	111	1			T64	18		T782	1		T803	1
values[28]	98	1			T64	10		T782	1		T803	2
values[29]	88	1			T64	20		T782	1		T803	1
values[30]	84	1			T64	5		T782	1		T803	4
values[31]	84	1			T64	13		T782	1		T803	8
values[32]	74	1			T64	17		T782	1		T803	5
values[33]	89	1			T64	24		T782	1		T803	8
values[34]	72	1			T64	15		T782	1		T803	7
values[35]	83	1			T64	14		T782	1		T803	7
values[36]	82	1			T64	24		T782	1		T803	14
values[37]	78	1			T64	27		T782	1		T803	10
values[38]	62	1			T64	20		T782	1		T803	1
values[39]	55	1			T64	12		T782	1		T803	6
values[40]	71	1			T64	23		T782	1		T803	4
values[41]	74	1			T64	35		T782	1		T803	1
values[42]	74	1			T64	28		T782	1		T803	8
values[43]	137	1			T64	61		T782	1		T803	2
values[44]	174	1			T64	67		T782	1		T803	7
values[45]	154	1			T64	54		T782	1		T803	6
values[46]	86	1			T64	17		T782	1		T803	9
values[47]	75	1			T64	22		T782	1		T803	5
values[48]	142	1			T64	48		T782	1		T803	30
values[49]	142	1			T64	54		T782	1		T803	21
values[50]	84	1			T64	33		T782	1		T803	12
values[51]	52	1			T64	6		T782	1		T803	19
values[52]	40	1			T64	1		T782	1		T803	7
values[53]	50	1			T782	1		T803	10		T804	1
values[54]	61	1			T782	1		T803	25		T804	1
values[55]	46	1			T782	1		T803	25		T804	1
values[56]	67	1			T782	1		T803	35		T804	1
values[57]	61	1			T782	1		T803	29		T804	1
values[58]	32	1			T782	1		T803	3		T804	1
values[59]	33	1			T782	1		T804	1		T434	1
values[60]	31	1			T782	1		T804	1		T434	1
values[61]	19	1			T782	1		T804	1		T434	1
values[62]	32	1			T782	1		T804	1		T434	1
values[63]	34	1			T782	1		T804	1		T434	1
values[64]	18	1			T782	1		T804	1		T434	1
values[65]	15	1			T782	1		T804	1		T434	1
values[66]	15	1			T782	1		T804	1		T434	1
values[67]	16	1			T782	1		T804	1		T434	1
values[68]	15	1			T782	1		T804	1		T434	1
values[69]	15	1			T782	1		T804	1		T434	1
values[70]	15	1			T782	1		T804	1		T434	1
values[71]	15	1			T782	1		T804	1		T434	1
values[72]	22	1			T782	1		T804	1		T434	1
values[73]	17	1			T782	1		T804	1		T434	1
values[74]	17	1			T782	1		T804	1		T434	1
values[75]	28	1			T782	1		T804	1		T434	1
values[76]	20	1			T782	1		T804	1		T434	1
values[77]	18	1			T782	1		T804	1		T434	1
values[78]	16	1			T782	1		T804	1		T434	1
values[79]	21	1			T782	1		T804	1		T434	1
values[80]	34	1			T782	1		T804	1		T434	1
values[81]	22	1			T782	1		T804	1		T434	1
values[82]	20	1			T782	1		T804	1		T434	1
values[83]	24	1			T782	1		T804	1		T434	1
values[84]	21	1			T782	1		T804	1		T434	2
values[85]	23	1			T782	1		T804	1		T434	1
values[86]	21	1			T782	1		T804	1		T434	1
values[87]	18	1			T782	1		T804	1		T434	1
values[88]	20	1			T782	1		T804	1		T434	1
values[89]	23	1			T782	1		T804	1		T434	1
values[90]	18	1			T782	1		T804	1		T434	1
values[91]	23	1			T782	1		T804	1		T434	1
values[92]	22	1			T782	1		T804	1		T434	1
values[93]	19	1			T782	1		T804	2		T434	1
values[94]	20	1			T782	1		T804	1		T434	1
values[95]	21	1			T782	2		T804	1		T434	1
values[96]	26	1			T782	1		T804	1		T434	1
values[97]	18	1			T782	1		T804	1		T434	1
values[98]	19	1			T782	1		T804	1		T434	1
values[99]	24	1			T782	1		T804	1		T434	1
values[100]	21	1			T782	1		T804	1		T434	1
values[101]	24	1			T782	1		T804	1		T434	1
values[102]	23	1			T782	1		T804	1		T434	1
values[103]	30	1			T782	1		T804	1		T434	1
values[104]	24	1			T782	1		T804	1		T434	1
values[105]	21	1			T782	1		T804	1		T434	1
values[106]	22	1			T782	1		T804	1		T434	1
values[107]	25	1			T782	1		T804	1		T434	1
values[108]	27	1			T782	1		T804	1		T434	1
values[109]	17	1			T782	1		T804	1		T434	1
values[110]	19	1			T782	1		T804	1		T434	1
values[111]	28	1			T782	1		T804	1		T434	1
values[112]	23	1			T782	1		T804	1		T434	4
values[113]	23	1			T782	1		T804	3		T434	3
values[114]	24	1			T782	1		T804	2		T434	2
values[115]	24	1			T782	1		T804	1		T434	1
values[116]	23	1			T782	2		T804	1		T434	1
values[117]	31	1			T782	3		T804	3		T434	2
values[118]	30	1			T782	1		T804	1		T434	2
values[119]	32	1			T782	3		T804	2		T434	3
values[120]	29	1			T782	6		T804	1		T434	1
values[121]	30	1			T782	1		T804	3		T434	1
values[122]	34	1			T782	3		T804	1		T434	1
values[123]	31	1			T782	6		T804	1		T434	1
values[124]	26	1			T782	1		T804	1		T434	2
values[125]	32	1			T782	1		T804	2		T434	1
values[126]	205	1			T782	22		T804	10		T434	10
values[127]	1675	1			T782	158		T804	97		T434	107
values[128]	3213	1			T782	227		T804	174		T434	226