Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138926	1			T62	110		T63	10		T105	4
values[2]	8290	1			T66	274		T234	42		T395	398
values[3]	2872	1			T66	79		T395	160		T785	1
values[4]	1615	1			T66	41		T395	60		T785	1
values[5]	1015	1			T66	20		T395	33		T785	1
values[6]	755	1			T66	7		T395	10		T785	1
values[7]	579	1			T66	1		T395	6		T785	1
values[8]	502	1			T395	4		T785	1		T779	1
values[9]	536	1			T785	1		T779	1		T572	22
values[10]	449	1			T785	1		T779	1		T572	9
values[11]	471	1			T785	1		T779	1		T572	13
values[12]	447	1			T785	1		T779	1		T572	12
values[13]	399	1			T785	1		T779	1		T572	21
values[14]	335	1			T785	1		T779	1		T572	8
values[15]	388	1			T785	1		T779	1		T572	17
values[16]	371	1			T785	1		T779	1		T572	13
values[17]	333	1			T785	1		T779	1		T572	10
values[18]	327	1			T785	1		T779	1		T572	11
values[19]	300	1			T785	1		T779	1		T572	20
values[20]	332	1			T785	1		T779	1		T572	14
values[21]	328	1			T785	1		T779	1		T572	10
values[22]	331	1			T785	1		T779	1		T572	18
values[23]	365	1			T785	1		T779	1		T572	12
values[24]	374	1			T785	1		T779	1		T572	13
values[25]	303	1			T785	1		T779	1		T572	7
values[26]	304	1			T785	1		T779	1		T572	8
values[27]	357	1			T785	1		T779	1		T572	14
values[28]	373	1			T785	1		T779	1		T572	20
values[29]	325	1			T785	1		T779	1		T572	13
values[30]	316	1			T785	1		T779	2		T572	18
values[31]	321	1			T785	1		T779	1		T572	13
values[32]	328	1			T785	1		T779	1		T572	20
values[33]	327	1			T785	1		T779	1		T572	11
values[34]	293	1			T785	1		T779	1		T572	14
values[35]	375	1			T785	1		T779	1		T572	10
values[36]	332	1			T785	1		T779	1		T572	7
values[37]	315	1			T785	1		T779	1		T572	12
values[38]	360	1			T785	1		T779	1		T572	10
values[39]	294	1			T785	1		T779	2		T572	9
values[40]	316	1			T785	1		T779	1		T572	14
values[41]	348	1			T785	1		T779	1		T572	29
values[42]	294	1			T785	1		T779	1		T572	15
values[43]	312	1			T785	1		T779	1		T572	11
values[44]	326	1			T785	1		T779	1		T572	31
values[45]	281	1			T785	1		T779	1		T572	11
values[46]	331	1			T785	1		T779	1		T572	15
values[47]	283	1			T785	1		T779	1		T572	13
values[48]	314	1			T785	1		T779	1		T572	16
values[49]	298	1			T785	1		T779	1		T572	15
values[50]	293	1			T785	1		T779	1		T572	16
values[51]	325	1			T785	1		T779	1		T572	14
values[52]	304	1			T785	1		T779	1		T572	22
values[53]	287	1			T785	1		T779	1		T572	9
values[54]	246	1			T785	1		T779	1		T572	7
values[55]	251	1			T785	1		T779	1		T572	9
values[56]	304	1			T785	1		T779	1		T572	16
values[57]	248	1			T785	1		T779	1		T572	17
values[58]	223	1			T785	1		T779	1		T572	12
values[59]	186	1			T785	1		T779	1		T572	7
values[60]	210	1			T785	1		T779	1		T572	6
values[61]	213	1			T785	1		T779	1		T572	6
values[62]	201	1			T785	1		T779	1		T572	4
values[63]	181	1			T785	1		T779	1		T572	4
values[64]	157	1			T785	1		T779	1		T572	4
values[65]	162	1			T785	1		T779	1		T572	10
values[66]	152	1			T785	1		T779	1		T572	9
values[67]	154	1			T785	1		T779	1		T572	7
values[68]	134	1			T785	1		T779	1		T572	7
values[69]	132	1			T785	1		T779	1		T572	13
values[70]	141	1			T785	1		T779	1		T572	8
values[71]	166	1			T785	1		T779	1		T572	5
values[72]	136	1			T785	1		T779	1		T572	10
values[73]	108	1			T785	1		T779	1		T572	8
values[74]	141	1			T785	1		T779	1		T572	6
values[75]	117	1			T785	1		T779	1		T572	4
values[76]	119	1			T785	1		T779	1		T572	6
values[77]	88	1			T785	1		T779	1		T572	9
values[78]	101	1			T785	1		T779	1		T572	9
values[79]	115	1			T785	1		T779	1		T572	14
values[80]	111	1			T785	1		T779	1		T572	10
values[81]	83	1			T785	1		T779	1		T556	5
values[82]	115	1			T785	1		T779	1		T556	2
values[83]	108	1			T785	1		T779	1		T556	6
values[84]	111	1			T785	1		T779	1		T556	13
values[85]	122	1			T785	1		T779	1		T556	4
values[86]	107	1			T785	1		T779	1		T556	9
values[87]	109	1			T785	1		T779	1		T556	5
values[88]	117	1			T785	1		T779	1		T556	6
values[89]	124	1			T785	1		T779	1		T556	5
values[90]	118	1			T785	1		T779	2		T556	2
values[91]	106	1			T785	2		T779	1		T556	1
values[92]	99	1			T785	1		T779	1		T556	4
values[93]	106	1			T785	1		T779	1		T556	3
values[94]	105	1			T785	1		T779	1		T556	3
values[95]	122	1			T785	1		T779	1		T556	3
values[96]	110	1			T785	1		T779	1		T556	5
values[97]	102	1			T785	3		T779	1		T556	2
values[98]	120	1			T785	4		T779	1		T556	12
values[99]	110	1			T785	3		T779	1		T556	11
values[100]	112	1			T785	4		T779	1		T556	5
values[101]	124	1			T785	5		T779	1		T556	1
values[102]	92	1			T785	3		T779	1		T556	2
values[103]	119	1			T785	2		T779	1		T556	5
values[104]	118	1			T785	1		T779	1		T556	4
values[105]	128	1			T785	2		T779	1		T556	2
values[106]	112	1			T785	1		T779	1		T556	2
values[107]	92	1			T785	1		T779	1		T556	4
values[108]	105	1			T785	3		T779	1		T790	1
values[109]	93	1			T785	2		T779	1		T790	1
values[110]	91	1			T785	2		T779	1		T790	1
values[111]	101	1			T785	1		T779	1		T790	1
values[112]	103	1			T785	1		T779	1		T790	1
values[113]	94	1			T785	1		T779	1		T790	1
values[114]	86	1			T785	2		T779	1		T790	1
values[115]	85	1			T785	4		T779	3		T790	2
values[116]	96	1			T785	4		T779	1		T790	1
values[117]	88	1			T785	1		T779	1		T790	4
values[118]	89	1			T785	3		T779	2		T790	1
values[119]	75	1			T785	1		T779	2		T790	1
values[120]	88	1			T785	1		T779	3		T790	10
values[121]	96	1			T785	1		T779	3		T790	3
values[122]	98	1			T785	1		T779	1		T790	3
values[123]	88	1			T785	1		T779	3		T790	2
values[124]	121	1			T785	1		T779	3		T790	2
values[125]	127	1			T785	1		T779	2		T790	2
values[126]	266	1			T785	5		T779	4		T790	4
values[127]	1108	1			T785	36		T779	34		T790	39
values[128]	6923	1			T785	317		T779	332		T790	295