Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	140047	1			T62	86		T63	8		T105	3
values[2]	10365	1			T62	1		T63	1		T234	1
values[3]	4376	1			T395	36		T785	1		T413	96
values[4]	2430	1			T395	7		T785	1		T413	46
values[5]	1559	1			T785	1		T413	28		T636	3
values[6]	961	1			T785	1		T413	18		T636	7
values[7]	669	1			T785	1		T413	28		T636	1
values[8]	544	1			T785	1		T413	51		T636	2
values[9]	470	1			T785	1		T413	21		T636	2
values[10]	384	1			T785	1		T413	15		T636	4
values[11]	343	1			T785	1		T413	9		T636	2
values[12]	286	1			T785	1		T636	1		T405	12
values[13]	289	1			T785	1		T405	8		T572	12
values[14]	286	1			T785	1		T405	12		T572	4
values[15]	291	1			T785	1		T405	8		T572	4
values[16]	263	1			T785	1		T405	5		T572	3
values[17]	229	1			T785	1		T405	3		T572	5
values[18]	284	1			T785	1		T405	7		T572	26
values[19]	249	1			T785	1		T405	10		T572	5
values[20]	231	1			T785	1		T405	6		T572	4
values[21]	202	1			T785	1		T405	4		T572	3
values[22]	245	1			T785	1		T405	5		T572	4
values[23]	278	1			T785	1		T405	7		T572	5
values[24]	277	1			T785	1		T405	7		T572	11
values[25]	206	1			T785	1		T405	4		T572	5
values[26]	231	1			T785	1		T405	18		T572	10
values[27]	231	1			T785	1		T405	15		T572	15
values[28]	256	1			T785	1		T405	9		T572	6
values[29]	256	1			T785	1		T405	7		T572	9
values[30]	214	1			T785	1		T405	11		T572	5
values[31]	206	1			T785	1		T405	7		T572	6
values[32]	225	1			T785	1		T405	11		T572	4
values[33]	249	1			T785	1		T405	7		T572	10
values[34]	227	1			T785	1		T405	7		T572	17
values[35]	211	1			T785	1		T405	11		T572	11
values[36]	234	1			T785	1		T405	5		T572	4
values[37]	253	1			T785	1		T405	3		T572	8
values[38]	205	1			T785	1		T405	4		T572	3
values[39]	188	1			T785	1		T405	6		T572	5
values[40]	195	1			T785	1		T405	4		T572	3
values[41]	204	1			T785	1		T405	6		T572	6
values[42]	201	1			T785	1		T405	6		T572	14
values[43]	199	1			T785	1		T405	4		T572	14
values[44]	229	1			T785	1		T405	4		T572	12
values[45]	236	1			T785	1		T405	5		T572	7
values[46]	217	1			T785	1		T405	6		T572	4
values[47]	202	1			T785	1		T405	6		T572	7
values[48]	184	1			T785	1		T405	6		T572	7
values[49]	178	1			T785	1		T405	4		T572	4
values[50]	196	1			T785	1		T405	8		T572	6
values[51]	218	1			T785	1		T405	7		T572	3
values[52]	212	1			T785	1		T405	5		T572	6
values[53]	206	1			T785	1		T405	10		T572	8
values[54]	197	1			T785	1		T405	10		T572	7
values[55]	179	1			T785	1		T405	10		T572	12
values[56]	164	1			T785	1		T405	10		T572	3
values[57]	178	1			T785	1		T405	9		T572	7
values[58]	214	1			T785	1		T405	15		T572	7
values[59]	191	1			T785	1		T405	5		T572	4
values[60]	185	1			T785	1		T405	7		T572	9
values[61]	151	1			T785	1		T405	5		T572	7
values[62]	148	1			T785	1		T405	3		T572	15
values[63]	172	1			T785	1		T405	6		T572	3
values[64]	142	1			T785	1		T405	6		T572	11
values[65]	113	1			T785	1		T405	4		T572	5
values[66]	124	1			T785	1		T405	9		T572	10
values[67]	140	1			T785	1		T405	6		T572	4
values[68]	128	1			T785	1		T405	9		T572	4
values[69]	97	1			T785	1		T572	7		T556	21
values[70]	81	1			T785	1		T572	8		T556	20
values[71]	70	1			T785	1		T572	7		T556	14
values[72]	91	1			T785	1		T572	3		T556	32
values[73]	72	1			T785	1		T572	4		T556	11
values[74]	88	1			T785	1		T572	6		T556	13
values[75]	85	1			T785	1		T572	6		T556	21
values[76]	74	1			T785	1		T572	4		T556	15
values[77]	55	1			T785	1		T556	5		T782	1
values[78]	60	1			T785	1		T556	11		T782	1
values[79]	59	1			T785	1		T556	6		T782	1
values[80]	60	1			T785	1		T556	6		T782	1
values[81]	50	1			T785	1		T556	4		T782	1
values[82]	46	1			T785	1		T556	7		T782	1
values[83]	48	1			T785	1		T556	2		T782	1
values[84]	56	1			T785	1		T556	3		T782	1
values[85]	61	1			T785	1		T556	2		T782	1
values[86]	51	1			T785	1		T556	2		T782	1
values[87]	60	1			T785	1		T556	3		T782	1
values[88]	62	1			T785	1		T556	4		T782	1
values[89]	64	1			T785	1		T556	4		T782	1
values[90]	64	1			T785	1		T556	12		T782	1
values[91]	54	1			T785	1		T556	3		T782	1
values[92]	66	1			T785	1		T556	3		T782	1
values[93]	88	1			T785	1		T556	10		T782	1
values[94]	67	1			T785	1		T556	1		T782	1
values[95]	63	1			T785	1		T556	6		T782	1
values[96]	65	1			T785	1		T556	3		T782	1
values[97]	55	1			T785	1		T556	4		T782	1
values[98]	70	1			T785	1		T556	11		T782	1
values[99]	54	1			T785	1		T556	4		T782	1
values[100]	68	1			T785	1		T556	1		T782	1
values[101]	69	1			T785	1		T556	7		T782	2
values[102]	75	1			T785	1		T556	2		T782	1
values[103]	58	1			T785	1		T556	2		T782	1
values[104]	64	1			T785	1		T556	6		T782	1
values[105]	68	1			T785	1		T556	4		T782	1
values[106]	71	1			T785	1		T556	4		T782	1
values[107]	65	1			T785	1		T556	4		T782	1
values[108]	71	1			T785	2		T556	2		T782	1
values[109]	62	1			T785	1		T556	3		T782	2
values[110]	62	1			T785	1		T556	1		T782	1
values[111]	63	1			T785	1		T556	2		T782	1
values[112]	59	1			T785	1		T556	6		T782	1
values[113]	57	1			T785	1		T556	5		T782	1
values[114]	60	1			T785	1		T556	4		T782	1
values[115]	68	1			T785	2		T556	6		T782	1
values[116]	56	1			T785	3		T556	1		T782	1
values[117]	49	1			T785	1		T782	1		T788	1
values[118]	64	1			T785	1		T782	1		T788	3
values[119]	57	1			T785	6		T782	1		T788	1
values[120]	62	1			T785	3		T782	1		T788	4
values[121]	62	1			T785	1		T782	1		T788	3
values[122]	58	1			T785	1		T782	1		T788	3
values[123]	61	1			T785	2		T782	1		T788	1
values[124]	68	1			T785	1		T782	4		T788	6
values[125]	74	1			T785	3		T782	8		T788	6
values[126]	80	1			T785	2		T782	2		T788	2
values[127]	780	1			T785	32		T782	31		T788	27
values[128]	7412	1			T785	364		T782	396		T788	330