Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141988	1			T62	98		T63	7		T64	148
values[2]	8437	1			T64	164		T234	24		T395	2
values[3]	3866	1			T64	75		T234	8		T453	1
values[4]	2223	1			T64	21		T234	15		T413	5
values[5]	1572	1			T64	39		T234	10		T413	1
values[6]	1164	1			T64	15		T234	4		T412	1
values[7]	847	1			T412	1		T636	18		T405	20
values[8]	777	1			T412	1		T636	33		T405	17
values[9]	632	1			T412	1		T636	12		T405	15
values[10]	567	1			T412	1		T636	1		T405	12
values[11]	570	1			T412	1		T405	17		T572	1
values[12]	551	1			T412	1		T405	8		T781	1
values[13]	652	1			T412	1		T781	1		T808	30
values[14]	507	1			T412	1		T781	1		T808	22
values[15]	549	1			T412	1		T781	1		T808	45
values[16]	497	1			T412	1		T781	1		T808	22
values[17]	475	1			T412	1		T781	1		T808	11
values[18]	503	1			T412	1		T781	1		T808	17
values[19]	480	1			T412	1		T781	1		T808	25
values[20]	451	1			T412	1		T781	1		T808	4
values[21]	494	1			T412	1		T781	1		T808	5
values[22]	433	1			T412	1		T781	1		T808	6
values[23]	433	1			T412	1		T781	1		T808	11
values[24]	466	1			T412	1		T781	1		T808	13
values[25]	536	1			T412	1		T781	1		T808	15
values[26]	467	1			T412	1		T781	1		T808	7
values[27]	433	1			T412	1		T781	2		T808	10
values[28]	480	1			T412	1		T781	1		T808	28
values[29]	436	1			T412	1		T781	1		T808	13
values[30]	473	1			T412	1		T781	1		T808	6
values[31]	431	1			T412	1		T781	1		T808	2
values[32]	400	1			T412	1		T781	1		T587	7
values[33]	424	1			T412	1		T781	1		T587	13
values[34]	439	1			T412	1		T781	1		T587	11
values[35]	359	1			T412	1		T781	1		T587	7
values[36]	359	1			T412	1		T781	1		T587	10
values[37]	405	1			T412	1		T781	1		T587	4
values[38]	389	1			T412	1		T781	1		T587	7
values[39]	334	1			T412	1		T781	1		T425	12
values[40]	362	1			T412	1		T781	1		T425	4
values[41]	347	1			T412	1		T781	1		T425	4
values[42]	328	1			T412	1		T781	1		T425	5
values[43]	315	1			T412	1		T781	1		T425	5
values[44]	294	1			T412	1		T781	1		T425	19
values[45]	351	1			T412	1		T781	1		T425	18
values[46]	307	1			T412	1		T781	1		T425	13
values[47]	294	1			T412	1		T781	1		T425	11
values[48]	264	1			T412	1		T781	1		T425	16
values[49]	224	1			T412	1		T781	1		T425	5
values[50]	182	1			T412	1		T781	1		T425	2
values[51]	201	1			T412	1		T781	1		T425	8
values[52]	190	1			T412	1		T781	1		T425	1
values[53]	177	1			T412	1		T781	1		T425	3
values[54]	152	1			T412	1		T781	1		T425	4
values[55]	127	1			T412	1		T781	1		T425	2
values[56]	114	1			T412	1		T781	1		T425	2
values[57]	106	1			T412	1		T781	1		T425	2
values[58]	120	1			T412	1		T781	1		T425	1
values[59]	124	1			T412	1		T781	1		T425	2
values[60]	121	1			T412	1		T781	1		T425	1
values[61]	116	1			T412	1		T781	1		T425	2
values[62]	159	1			T412	1		T781	1		T425	6
values[63]	184	1			T412	1		T781	1		T425	7
values[64]	219	1			T412	1		T781	1		T425	2
values[65]	172	1			T412	1		T781	1		T425	3
values[66]	155	1			T412	1		T781	1		T425	3
values[67]	150	1			T412	1		T781	1		T425	1
values[68]	122	1			T412	1		T781	1		T425	2
values[69]	150	1			T412	1		T781	1		T425	5
values[70]	161	1			T412	1		T781	1		T425	4
values[71]	163	1			T412	1		T781	1		T425	3
values[72]	165	1			T412	1		T781	2		T425	5
values[73]	159	1			T412	1		T781	1		T425	1
values[74]	168	1			T412	1		T781	1		T425	8
values[75]	146	1			T412	1		T781	1		T425	7
values[76]	119	1			T412	1		T781	1		T425	4
values[77]	147	1			T412	1		T781	1		T425	4
values[78]	113	1			T412	1		T781	1		T425	2
values[79]	91	1			T412	1		T781	1		T425	3
values[80]	79	1			T412	1		T781	1		T425	1
values[81]	91	1			T412	1		T781	1		T425	2
values[82]	97	1			T412	1		T781	1		T425	5
values[83]	97	1			T412	1		T781	1		T425	2
values[84]	93	1			T412	1		T781	1		T425	4
values[85]	130	1			T412	1		T781	1		T425	5
values[86]	97	1			T412	1		T781	1		T425	2
values[87]	83	1			T412	1		T781	1		T425	7
values[88]	94	1			T412	1		T781	1		T425	4
values[89]	112	1			T412	1		T781	1		T425	2
values[90]	120	1			T412	1		T781	1		T425	6
values[91]	103	1			T412	1		T781	1		T425	6
values[92]	112	1			T412	1		T781	1		T425	8
values[93]	107	1			T412	1		T781	1		T425	3
values[94]	103	1			T412	1		T781	1		T425	9
values[95]	106	1			T412	1		T781	1		T425	13
values[96]	91	1			T412	1		T781	1		T425	10
values[97]	108	1			T412	1		T781	1		T425	8
values[98]	102	1			T412	1		T781	1		T425	6
values[99]	108	1			T412	1		T781	1		T425	7
values[100]	101	1			T412	1		T781	1		T425	7
values[101]	88	1			T412	1		T781	1		T425	3
values[102]	76	1			T412	1		T781	1		T806	5
values[103]	97	1			T412	1		T781	1		T806	1
values[104]	87	1			T412	1		T781	1		T806	3
values[105]	76	1			T412	1		T781	1		T806	3
values[106]	73	1			T412	1		T781	1		T806	4
values[107]	61	1			T412	1		T781	1		T806	5
values[108]	85	1			T412	1		T781	1		T806	5
values[109]	76	1			T412	1		T781	1		T806	1
values[110]	71	1			T412	2		T781	1		T806	1
values[111]	62	1			T412	1		T781	1		T806	3
values[112]	59	1			T412	2		T781	1		T806	1
values[113]	64	1			T412	3		T781	1		T806	2
values[114]	66	1			T412	3		T781	1		T806	2
values[115]	69	1			T412	3		T781	1		T806	1
values[116]	62	1			T412	7		T781	2		T806	2
values[117]	62	1			T412	4		T781	2		T806	1
values[118]	46	1			T412	2		T781	3		T806	2
values[119]	57	1			T412	2		T781	5		T806	1
values[120]	41	1			T412	1		T781	1		T806	2
values[121]	52	1			T412	2		T781	2		T806	1
values[122]	48	1			T412	1		T781	2		T806	1
values[123]	53	1			T412	1		T781	2		T806	1
values[124]	73	1			T412	1		T781	3		T806	3
values[125]	64	1			T412	1		T781	1		T806	1
values[126]	124	1			T412	5		T781	3		T806	3
values[127]	1580	1			T412	44		T781	64		T806	56
values[128]	7409	1			T412	259		T781	300		T806	310