Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	157482	1			T61	100		T63	271		T67	80
values[2]	5779	1			T61	1		T63	3		T426	1
values[3]	3139	1			T489	52		T403	221		T432	4
values[4]	2173	1			T489	53		T403	159		T432	2
values[5]	1678	1			T489	39		T403	102		T432	3
values[6]	1378	1			T489	37		T403	60		T432	1
values[7]	1193	1			T489	51		T403	31		T432	1
values[8]	925	1			T489	45		T403	12		T432	3
values[9]	878	1			T489	39		T403	7		T432	1
values[10]	790	1			T489	45		T403	7		T432	3
values[11]	699	1			T489	21		T432	6		T819	38
values[12]	676	1			T489	8		T432	4		T819	23
values[13]	598	1			T489	8		T432	2		T819	17
values[14]	577	1			T489	3		T432	1		T819	11
values[15]	575	1			T432	1		T819	12		T445	16
values[16]	599	1			T432	3		T819	4		T445	8
values[17]	517	1			T432	2		T445	6		T446	1
values[18]	522	1			T432	3		T445	6		T446	1
values[19]	349	1			T432	1		T446	2		T804	9
values[20]	411	1			T432	2		T446	4		T804	8
values[21]	369	1			T432	2		T446	5		T804	14
values[22]	380	1			T432	2		T446	1		T804	33
values[23]	351	1			T432	1		T446	2		T804	35
values[24]	319	1			T432	4		T446	3		T804	25
values[25]	286	1			T432	5		T446	7		T804	19
values[26]	313	1			T432	7		T446	2		T804	6
values[27]	283	1			T432	5		T446	2		T804	2
values[28]	266	1			T432	2		T446	3		T805	2
values[29]	186	1			T432	1		T446	3		T805	2
values[30]	125	1			T432	1		T446	3		T805	3
values[31]	144	1			T432	1		T446	3		T805	2
values[32]	157	1			T432	2		T446	2		T805	2
values[33]	162	1			T432	1		T446	5		T805	2
values[34]	143	1			T432	2		T446	7		T805	2
values[35]	123	1			T432	2		T446	3		T805	2
values[36]	124	1			T432	1		T446	3		T805	2
values[37]	99	1			T432	3		T446	2		T805	2
values[38]	75	1			T432	2		T446	4		T805	2
values[39]	81	1			T432	2		T446	7		T805	2
values[40]	86	1			T432	4		T446	2		T805	2
values[41]	95	1			T432	4		T446	2		T805	2
values[42]	99	1			T432	3		T446	2		T805	2
values[43]	88	1			T432	4		T446	3		T805	2
values[44]	63	1			T432	1		T446	3		T805	2
values[45]	68	1			T432	2		T446	2		T805	2
values[46]	78	1			T432	1		T446	1		T805	2
values[47]	80	1			T432	1		T446	2		T805	2
values[48]	74	1			T432	1		T446	8		T805	2
values[49]	71	1			T432	2		T446	9		T805	2
values[50]	54	1			T432	6		T446	1		T805	2
values[51]	56	1			T432	10		T446	1		T805	2
values[52]	52	1			T432	4		T446	2		T805	2
values[53]	54	1			T432	5		T446	1		T805	2
values[54]	50	1			T432	1		T446	2		T805	2
values[55]	61	1			T432	5		T446	5		T805	2
values[56]	58	1			T432	6		T446	2		T805	2
values[57]	62	1			T432	1		T446	2		T805	2
values[58]	57	1			T432	3		T446	5		T805	2
values[59]	55	1			T432	1		T446	5		T805	2
values[60]	45	1			T432	3		T446	3		T805	2
values[61]	53	1			T432	1		T446	3		T805	2
values[62]	50	1			T432	2		T446	1		T805	2
values[63]	49	1			T432	2		T446	2		T805	2
values[64]	46	1			T432	2		T446	2		T805	2
values[65]	55	1			T432	1		T446	7		T805	2
values[66]	55	1			T432	1		T446	2		T805	2
values[67]	47	1			T432	2		T446	4		T805	2
values[68]	56	1			T432	2		T446	2		T805	2
values[69]	51	1			T432	2		T446	1		T805	2
values[70]	53	1			T432	3		T446	3		T805	2
values[71]	53	1			T432	2		T446	2		T805	2
values[72]	53	1			T432	2		T446	1		T805	2
values[73]	70	1			T432	2		T446	3		T805	2
values[74]	50	1			T432	3		T446	4		T805	2
values[75]	64	1			T432	2		T446	4		T805	2
values[76]	71	1			T432	3		T446	2		T805	2
values[77]	66	1			T432	1		T446	2		T805	2
values[78]	49	1			T432	2		T446	2		T805	2
values[79]	49	1			T432	1		T446	3		T805	2
values[80]	61	1			T432	1		T446	6		T805	2
values[81]	59	1			T432	2		T446	3		T805	2
values[82]	76	1			T432	2		T446	4		T805	4
values[83]	78	1			T432	2		T446	3		T805	7
values[84]	88	1			T432	3		T446	3		T805	4
values[85]	85	1			T432	4		T446	3		T805	6
values[86]	88	1			T432	1		T446	2		T805	8
values[87]	82	1			T432	3		T446	5		T805	6
values[88]	79	1			T432	1		T446	5		T805	4
values[89]	69	1			T432	6		T446	2		T805	2
values[90]	86	1			T432	4		T446	6		T805	2
values[91]	88	1			T432	2		T446	3		T805	3
values[92]	86	1			T432	2		T446	3		T805	2
values[93]	88	1			T432	1		T446	3		T805	4
values[94]	84	1			T432	3		T446	3		T805	2
values[95]	90	1			T432	1		T446	2		T805	2
values[96]	84	1			T432	2		T446	4		T805	3
values[97]	108	1			T432	3		T446	7		T805	2
values[98]	104	1			T432	3		T446	8		T805	3
values[99]	89	1			T432	3		T446	4		T805	6
values[100]	84	1			T432	3		T446	4		T805	9
values[101]	90	1			T432	4		T446	4		T805	2
values[102]	111	1			T432	2		T446	7		T805	3
values[103]	87	1			T432	4		T446	11		T805	4
values[104]	97	1			T432	2		T446	5		T805	2
values[105]	89	1			T432	2		T446	4		T805	3
values[106]	94	1			T432	1		T446	3		T805	3
values[107]	84	1			T432	5		T446	7		T805	2
values[108]	104	1			T432	6		T446	4		T805	2
values[109]	89	1			T432	6		T446	1		T805	4
values[110]	88	1			T432	4		T446	6		T805	3
values[111]	104	1			T432	4		T446	13		T805	6
values[112]	120	1			T432	5		T446	6		T805	6
values[113]	111	1			T432	3		T446	13		T805	4
values[114]	102	1			T432	2		T446	4		T805	4
values[115]	100	1			T432	3		T446	8		T805	4
values[116]	76	1			T432	5		T446	2		T805	3
values[117]	88	1			T432	4		T446	5		T805	3
values[118]	87	1			T432	3		T446	7		T805	4
values[119]	80	1			T432	3		T446	2		T805	3
values[120]	111	1			T432	8		T446	7		T805	4
values[121]	83	1			T432	7		T446	2		T805	6
values[122]	108	1			T432	5		T446	1		T805	6
values[123]	117	1			T432	14		T446	6		T805	4
values[124]	213	1			T432	25		T446	6		T805	2
values[125]	407	1			T432	55		T446	11		T805	4
values[126]	758	1			T432	59		T446	12		T805	42
values[127]	2587	1			T432	20		T446	2		T805	255
values[128]	4275	1			T432	4		T805	405		T822	183