Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	151452	1			T23	11		T24	104		T25	7
values[2]	3774	1			T25	1		T137	2		T451	1
values[3]	1852	1			T475	45		T554	2		T489	1
values[4]	1384	1			T475	29		T554	8		T846	13
values[5]	1159	1			T475	17		T554	2		T846	13
values[6]	1096	1			T475	4		T554	3		T846	7
values[7]	1003	1			T475	15		T554	4		T846	5
values[8]	925	1			T475	28		T554	2		T834	51
values[9]	774	1			T475	24		T554	1		T834	86
values[10]	714	1			T475	19		T554	2		T834	71
values[11]	750	1			T475	1		T554	6		T834	52
values[12]	712	1			T554	5		T834	28		T863	3
values[13]	583	1			T554	1		T834	13		T863	1
values[14]	465	1			T554	2		T834	3		T863	2
values[15]	407	1			T554	1		T863	2		T864	23
values[16]	365	1			T554	4		T863	1		T864	16
values[17]	268	1			T554	1		T863	1		T864	6
values[18]	228	1			T554	3		T863	1		T864	5
values[19]	220	1			T554	8		T863	1		T864	4
values[20]	211	1			T554	1		T863	5		T864	8
values[21]	213	1			T554	6		T863	2		T865	30
values[22]	191	1			T554	3		T863	2		T865	9
values[23]	208	1			T554	2		T863	1		T865	17
values[24]	221	1			T554	6		T863	3		T865	25
values[25]	235	1			T554	3		T863	1		T865	13
values[26]	259	1			T554	7		T863	2		T865	7
values[27]	219	1			T554	4		T863	1		T865	4
values[28]	276	1			T554	3		T863	4		T865	1
values[29]	242	1			T554	3		T863	3		T866	2
values[30]	227	1			T554	1		T863	6		T866	2
values[31]	177	1			T554	1		T863	3		T866	2
values[32]	146	1			T554	2		T863	3		T866	2
values[33]	153	1			T554	2		T863	3		T866	2
values[34]	136	1			T554	4		T863	3		T866	2
values[35]	143	1			T554	3		T863	1		T866	2
values[36]	166	1			T554	6		T863	4		T866	2
values[37]	131	1			T554	1		T863	4		T866	2
values[38]	114	1			T554	4		T863	1		T866	2
values[39]	100	1			T554	1		T863	1		T866	2
values[40]	84	1			T554	1		T863	2		T866	2
values[41]	82	1			T554	4		T863	1		T866	2
values[42]	73	1			T554	2		T863	1		T866	2
values[43]	79	1			T554	1		T863	2		T866	2
values[44]	73	1			T554	1		T863	4		T866	2
values[45]	118	1			T554	4		T863	3		T866	2
values[46]	97	1			T554	3		T863	2		T866	2
values[47]	102	1			T554	1		T863	3		T866	2
values[48]	91	1			T554	4		T863	1		T866	2
values[49]	105	1			T554	2		T863	4		T866	2
values[50]	100	1			T554	1		T863	5		T866	2
values[51]	146	1			T554	2		T863	9		T866	2
values[52]	105	1			T554	3		T863	4		T866	2
values[53]	93	1			T554	1		T863	3		T866	2
values[54]	77	1			T554	3		T863	2		T866	2
values[55]	70	1			T554	1		T863	1		T866	2
values[56]	78	1			T554	1		T863	2		T866	2
values[57]	72	1			T554	2		T863	4		T866	2
values[58]	63	1			T554	2		T863	1		T866	2
values[59]	54	1			T554	1		T863	3		T866	2
values[60]	76	1			T554	3		T863	9		T866	2
values[61]	61	1			T554	2		T863	4		T866	2
values[62]	58	1			T554	1		T863	1		T866	2
values[63]	60	1			T554	1		T863	2		T866	2
values[64]	56	1			T554	1		T863	2		T866	2
values[65]	61	1			T554	2		T863	2		T866	2
values[66]	66	1			T554	8		T863	3		T866	2
values[67]	62	1			T554	6		T863	2		T866	2
values[68]	65	1			T554	2		T863	5		T866	2
values[69]	64	1			T554	1		T863	2		T866	2
values[70]	67	1			T554	1		T863	1		T866	2
values[71]	83	1			T554	3		T863	1		T866	2
values[72]	75	1			T554	3		T863	2		T866	2
values[73]	76	1			T554	3		T863	3		T866	2
values[74]	78	1			T554	4		T863	3		T866	2
values[75]	77	1			T554	2		T863	2		T866	2
values[76]	79	1			T554	7		T863	1		T866	2
values[77]	89	1			T554	3		T863	1		T866	2
values[78]	77	1			T554	4		T863	3		T866	2
values[79]	80	1			T554	2		T863	3		T866	2
values[80]	79	1			T554	4		T863	1		T866	2
values[81]	94	1			T554	3		T863	1		T866	2
values[82]	80	1			T554	2		T863	2		T866	2
values[83]	83	1			T554	4		T863	4		T866	2
values[84]	83	1			T554	3		T863	2		T866	2
values[85]	109	1			T554	4		T863	1		T866	2
values[86]	104	1			T554	3		T863	2		T866	2
values[87]	84	1			T554	4		T863	1		T866	2
values[88]	77	1			T554	4		T863	2		T866	2
values[89]	83	1			T554	3		T863	3		T866	2
values[90]	85	1			T554	4		T863	3		T866	2
values[91]	92	1			T554	4		T863	1		T866	2
values[92]	95	1			T554	4		T866	2		T845	1
values[93]	98	1			T554	5		T866	7		T845	1
values[94]	101	1			T554	10		T866	4		T845	1
values[95]	82	1			T554	5		T866	4		T845	1
values[96]	91	1			T554	8		T866	6		T845	1
values[97]	106	1			T554	3		T866	5		T845	1
values[98]	114	1			T554	5		T866	4		T845	1
values[99]	86	1			T554	3		T866	3		T845	1
values[100]	84	1			T554	2		T866	9		T845	1
values[101]	117	1			T554	3		T866	11		T845	2
values[102]	124	1			T554	1		T866	12		T845	2
values[103]	102	1			T554	4		T866	5		T845	3
values[104]	99	1			T554	3		T866	2		T845	3
values[105]	82	1			T554	3		T866	4		T845	2
values[106]	113	1			T554	3		T866	5		T845	1
values[107]	108	1			T554	8		T866	5		T845	1
values[108]	124	1			T554	8		T866	3		T845	2
values[109]	134	1			T554	5		T866	6		T845	1
values[110]	114	1			T554	4		T866	6		T845	2
values[111]	107	1			T554	1		T866	9		T845	2
values[112]	114	1			T554	2		T866	3		T845	2
values[113]	116	1			T554	5		T866	5		T845	1
values[114]	127	1			T554	2		T866	2		T845	5
values[115]	112	1			T554	4		T866	3		T845	3
values[116]	113	1			T554	2		T866	2		T845	4
values[117]	94	1			T554	2		T866	4		T845	3
values[118]	116	1			T554	5		T866	8		T845	4
values[119]	136	1			T554	6		T866	7		T845	1
values[120]	114	1			T554	8		T866	5		T845	2
values[121]	114	1			T554	14		T866	4		T845	1
values[122]	122	1			T554	7		T866	3		T845	1
values[123]	153	1			T554	3		T866	3		T845	2
values[124]	284	1			T554	3		T866	6		T845	1
values[125]	438	1			T554	19		T866	2		T845	3
values[126]	680	1			T554	29		T866	26		T845	6
values[127]	2373	1			T554	10		T866	180		T845	110
values[128]	4155	1			T554	3		T866	413		T845	212