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Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2152 1 T30 1 T31 1 T422 811



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2155 1 T30 1 T31 1 T422 812



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2152 1 T30 1 T31 1 T422 811


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 113714 1 T4 597 T6 599 T48 583



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 113785 1 T4 598 T6 600 T48 584



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 113714 1 T4 597 T6 599 T48 583


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4172 1 T81 2 T290 1733 T43 9



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4172 1 T81 2 T290 1733 T43 9



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4172 1 T81 2 T290 1733 T43 9


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 204 1 T43 10 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 204 1 T43 10 T30 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 204 1 T43 10 T30 1 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 166 1 T43 10 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 166 1 T43 10 T30 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 166 1 T43 10 T30 1 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 165 1 T43 4 T30 1 T46 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 165 1 T43 4 T30 1 T46 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 165 1 T43 4 T30 1 T46 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 6855 1 T214 1730 T43 8 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 6862 1 T214 1730 T43 8 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 6855 1 T214 1730 T43 8 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 9314 1 T4 1733 T43 11 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 9315 1 T4 1733 T43 11 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 9314 1 T4 1733 T43 11 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3657 1 T43 8 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3659 1 T43 8 T30 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3657 1 T43 8 T30 1 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 393 1 T213 2 T43 8 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 393 1 T213 2 T43 8 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 393 1 T213 2 T43 8 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 179 1 T43 12 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 179 1 T43 12 T30 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 179 1 T43 12 T30 1 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2140 1 T372 816 T30 1 T340 504



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2142 1 T372 817 T30 1 T340 504



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2140 1 T372 816 T30 1 T340 504


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 390 1 T43 5 T30 1 T49 50



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 390 1 T43 5 T30 1 T49 50



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 390 1 T43 5 T30 1 T49 50


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 9929 1 T217 1091 T43 7 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 9931 1 T217 1091 T43 7 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 9929 1 T217 1091 T43 7 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 827 1 T81 2 T82 2 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 828 1 T81 2 T82 2 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 827 1 T81 2 T82 2 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3786 1 T81 1 T82 1 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3790 1 T81 1 T82 1 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3786 1 T81 1 T82 1 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4012 1 T81 1 T82 1 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4014 1 T81 1 T82 1 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4012 1 T81 1 T82 1 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4743 1 T43 10 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4744 1 T43 10 T30 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4743 1 T43 10 T30 1 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 188 1 T43 13 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 188 1 T43 13 T30 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 188 1 T43 13 T30 1 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 117016 1 T4 597 T6 599 T48 583



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 117087 1 T4 598 T6 600 T48 584



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 117016 1 T4 597 T6 599 T48 583


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 372 1 T43 13 T30 1 T49 50



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 372 1 T43 13 T30 1 T49 50



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 372 1 T43 13 T30 1 T49 50


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4610 1 T32 819 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4613 1 T32 820 T30 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4610 1 T32 819 T30 1 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3 1 T30 1 T31 1 T155 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3 1 T30 1 T31 1 T155 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3 1 T30 1 T31 1 T155 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1834 1 T30 1 T31 1 T385 521



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1839 1 T30 1 T46 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1834 1 T30 1 T31 1 T385 521


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 5699 1 T30 1 T50 818 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 5704 1 T30 1 T50 819 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 5699 1 T30 1 T50 818 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 120485 1 T4 597 T6 1726 T48 583



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 120558 1 T4 598 T6 1726 T48 584



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 120485 1 T4 597 T6 1726 T48 583


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 383 1 T136 1 T43 6 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 383 1 T136 1 T43 6 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 383 1 T136 1 T43 6 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3159 1 T81 1 T82 1 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3161 1 T81 1 T82 1 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3159 1 T81 1 T82 1 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 52996 1 T4 283 T6 283 T48 277



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 53095 1 T4 284 T6 284 T48 278



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 52996 1 T4 283 T6 283 T48 277


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 813 1 T30 1 T31 1 T155 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 814 1 T30 1 T31 1 T155 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 813 1 T30 1 T31 1 T155 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3761 1 T83 509 T30 1 T175 808



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3765 1 T83 509 T30 1 T175 809



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3761 1 T83 509 T30 1 T175 808


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3 1 T30 1 T31 1 T155 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3 1 T30 1 T31 1 T155 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3 1 T30 1 T31 1 T155 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3510 1 T67 537 T325 526 T326 816



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3512 1 T67 537 T325 526 T326 817



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3510 1 T67 537 T325 526 T326 816


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3458 1 T159 494 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3460 1 T159 494 T30 1 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3458 1 T159 494 T30 1 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 5568 1 T30 1 T84 531 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 5569 1 T30 1 T84 531 T31 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 5568 1 T30 1 T84 531 T31 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4592 1 T1 1 T30 1 T423 817



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4599 1 T1 1 T30 1 T423 818



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4592 1 T1 1 T30 1 T423 817


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 8254 1 T324 1 T30 1 T414 516



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 8277 1 T324 1 T376 1 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 8254 1 T324 1 T30 1 T414 516


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2424 1 T308 1 T43 7 T30 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2424 1 T308 1 T43 7 T30 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2424 1 T308 1 T43 7 T30 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2926 1 T242 813 T30 1 T31 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2929 1 T242 813 T30 1 T31 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%