Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138645	1			T73	234		T74	6		T75	49
values[2]	10203	1			T73	8		T79	7		T454	2
values[3]	3672	1			T79	1		T463	33		T474	2
values[4]	2076	1			T463	19		T570	27		T455	16
values[5]	1345	1			T463	24		T570	11		T455	4
values[6]	852	1			T463	15		T570	4		T455	3
values[7]	716	1			T463	12		T455	22		T470	5
values[8]	509	1			T463	11		T455	8		T470	4
values[9]	342	1			T463	15		T455	4		T470	1
values[10]	353	1			T463	8		T455	4		T470	3
values[11]	353	1			T463	5		T455	11		T470	2
values[12]	300	1			T463	1		T455	8		T470	6
values[13]	315	1			T455	16		T470	3		T502	1
values[14]	311	1			T455	9		T470	4		T502	1
values[15]	276	1			T455	8		T470	6		T502	1
values[16]	266	1			T455	3		T470	6		T502	1
values[17]	287	1			T455	4		T470	3		T502	1
values[18]	264	1			T455	3		T470	1		T502	1
values[19]	265	1			T455	4		T470	3		T502	1
values[20]	225	1			T455	4		T470	7		T502	1
values[21]	314	1			T455	5		T470	5		T502	1
values[22]	288	1			T455	7		T470	3		T502	1
values[23]	281	1			T455	10		T470	6		T502	1
values[24]	274	1			T455	13		T470	1		T502	1
values[25]	229	1			T455	15		T470	2		T502	1
values[26]	276	1			T455	5		T470	1		T502	1
values[27]	250	1			T455	7		T470	2		T502	1
values[28]	271	1			T455	16		T470	2		T502	1
values[29]	243	1			T455	3		T470	3		T502	1
values[30]	270	1			T455	8		T470	4		T502	1
values[31]	272	1			T455	15		T470	2		T502	1
values[32]	280	1			T455	4		T470	2		T502	1
values[33]	272	1			T455	7		T470	3		T502	1
values[34]	267	1			T455	8		T470	2		T502	1
values[35]	275	1			T455	14		T470	5		T502	1
values[36]	267	1			T455	8		T470	5		T502	1
values[37]	274	1			T455	11		T470	1		T502	1
values[38]	238	1			T455	10		T470	3		T502	1
values[39]	246	1			T455	5		T470	2		T502	1
values[40]	229	1			T455	4		T470	5		T502	1
values[41]	239	1			T455	4		T470	2		T502	1
values[42]	233	1			T455	14		T470	6		T502	1
values[43]	273	1			T455	11		T470	1		T502	1
values[44]	253	1			T455	5		T470	3		T502	1
values[45]	245	1			T455	3		T470	14		T502	1
values[46]	205	1			T455	12		T470	3		T502	1
values[47]	211	1			T455	10		T470	1		T502	1
values[48]	270	1			T455	7		T470	1		T502	1
values[49]	222	1			T455	6		T470	2		T502	1
values[50]	245	1			T455	6		T470	5		T502	1
values[51]	233	1			T455	4		T470	7		T502	1
values[52]	202	1			T470	7		T502	1		T815	4
values[53]	218	1			T470	10		T502	1		T815	6
values[54]	236	1			T470	6		T502	1		T815	4
values[55]	189	1			T470	3		T502	1		T815	3
values[56]	228	1			T470	1		T502	1		T815	6
values[57]	230	1			T470	1		T502	1		T815	9
values[58]	185	1			T470	5		T502	1		T815	9
values[59]	146	1			T470	3		T502	1		T815	5
values[60]	167	1			T470	1		T502	1		T815	6
values[61]	150	1			T470	1		T502	1		T815	5
values[62]	155	1			T470	2		T502	1		T815	5
values[63]	159	1			T470	1		T502	1		T815	5
values[64]	134	1			T470	1		T502	1		T815	5
values[65]	153	1			T470	1		T502	1		T815	7
values[66]	109	1			T470	2		T502	1		T815	6
values[67]	91	1			T470	1		T502	1		T815	4
values[68]	82	1			T470	2		T502	1		T815	5
values[69]	90	1			T470	1		T502	1		T815	4
values[70]	112	1			T470	1		T502	1		T815	5
values[71]	79	1			T470	3		T502	1		T815	1
values[72]	85	1			T470	4		T502	1		T479	3
values[73]	83	1			T470	6		T502	1		T479	6
values[74]	77	1			T470	4		T502	1		T479	3
values[75]	82	1			T470	15		T502	1		T479	11
values[76]	86	1			T470	14		T502	1		T479	12
values[77]	80	1			T470	12		T502	1		T479	9
values[78]	88	1			T470	11		T502	1		T479	8
values[79]	89	1			T470	3		T502	1		T479	7
values[80]	93	1			T470	7		T502	1		T479	9
values[81]	96	1			T470	9		T502	1		T479	13
values[82]	69	1			T470	4		T502	1		T816	1
values[83]	72	1			T470	2		T502	1		T816	4
values[84]	66	1			T470	8		T502	1		T816	1
values[85]	82	1			T470	8		T502	2		T816	3
values[86]	83	1			T470	9		T502	1		T816	15
values[87]	58	1			T470	7		T502	1		T816	1
values[88]	67	1			T470	5		T502	1		T816	2
values[89]	92	1			T470	6		T502	1		T816	3
values[90]	81	1			T470	7		T502	1		T816	4
values[91]	58	1			T470	8		T502	1		T816	3
values[92]	63	1			T470	4		T502	1		T816	1
values[93]	80	1			T470	8		T502	1		T816	2
values[94]	84	1			T470	8		T502	1		T816	14
values[95]	75	1			T470	7		T502	1		T816	3
values[96]	72	1			T470	7		T502	1		T816	2
values[97]	59	1			T502	1		T816	2		T817	6
values[98]	77	1			T502	1		T816	2		T817	6
values[99]	61	1			T502	1		T816	5		T817	5
values[100]	51	1			T502	1		T816	5		T818	1
values[101]	59	1			T502	1		T816	2		T818	1
values[102]	50	1			T502	1		T816	2		T818	1
values[103]	47	1			T502	1		T816	2		T818	1
values[104]	60	1			T502	1		T816	2		T818	1
values[105]	57	1			T502	1		T816	1		T818	1
values[106]	63	1			T502	1		T816	7		T818	1
values[107]	50	1			T502	3		T816	1		T818	1
values[108]	56	1			T502	3		T816	3		T818	1
values[109]	52	1			T502	1		T816	1		T818	2
values[110]	50	1			T502	2		T816	1		T818	1
values[111]	41	1			T502	1		T816	1		T818	1
values[112]	32	1			T502	1		T816	1		T818	1
values[113]	52	1			T502	4		T816	2		T818	1
values[114]	60	1			T502	4		T816	1		T818	1
values[115]	53	1			T502	7		T816	2		T818	1
values[116]	45	1			T502	1		T816	1		T818	2
values[117]	57	1			T502	2		T816	3		T818	3
values[118]	49	1			T502	1		T816	2		T818	2
values[119]	55	1			T502	1		T816	1		T818	1
values[120]	53	1			T502	3		T816	1		T818	3
values[121]	55	1			T502	2		T816	2		T818	4
values[122]	55	1			T502	3		T816	2		T818	2
values[123]	53	1			T502	2		T816	2		T818	2
values[124]	69	1			T502	1		T816	3		T818	2
values[125]	97	1			T502	3		T816	1		T818	1
values[126]	121	1			T502	2		T816	2		T818	1
values[127]	605	1			T502	28		T816	29		T818	37
values[128]	4774	1			T502	315		T816	249		T818	393