Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rom_ctrl__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	154856	1			T76	70		T77	1207		T79	75
values[2]	4025	1			T76	3		T79	2		T473	1
values[3]	1838	1			T677	1		T551	1		T491	1
values[4]	1341	1			T677	1		T551	1		T485	34
values[5]	1142	1			T677	1		T551	1		T485	14
values[6]	982	1			T677	1		T551	1		T485	12
values[7]	866	1			T677	1		T551	1		T485	17
values[8]	769	1			T677	1		T551	1		T485	3
values[9]	605	1			T677	1		T551	1		T485	6
values[10]	477	1			T677	1		T551	1		T485	6
values[11]	446	1			T677	1		T551	1		T485	3
values[12]	470	1			T677	1		T551	1		T485	19
values[13]	473	1			T677	1		T551	1		T485	16
values[14]	506	1			T677	1		T551	1		T485	34
values[15]	508	1			T677	1		T551	1		T485	27
values[16]	497	1			T677	1		T551	1		T485	10
values[17]	422	1			T677	1		T551	1		T485	9
values[18]	378	1			T677	1		T551	1		T485	9
values[19]	265	1			T677	1		T551	1		T485	7
values[20]	204	1			T677	1		T551	1		T485	12
values[21]	224	1			T677	1		T551	1		T485	3
values[22]	255	1			T677	1		T551	1		T485	13
values[23]	218	1			T677	1		T551	1		T485	15
values[24]	195	1			T677	1		T551	1		T485	8
values[25]	168	1			T677	1		T551	1		T485	5
values[26]	178	1			T677	1		T551	1		T485	9
values[27]	172	1			T677	1		T551	1		T485	7
values[28]	157	1			T677	1		T551	1		T485	7
values[29]	105	1			T677	1		T551	1		T485	3
values[30]	93	1			T677	1		T551	1		T485	4
values[31]	65	1			T677	1		T551	1		T828	1
values[32]	73	1			T677	1		T551	1		T828	1
values[33]	75	1			T677	1		T551	1		T828	1
values[34]	58	1			T677	1		T551	1		T828	1
values[35]	66	1			T677	1		T551	1		T828	1
values[36]	69	1			T677	1		T551	1		T828	1
values[37]	70	1			T677	1		T551	1		T828	1
values[38]	63	1			T677	1		T551	1		T828	1
values[39]	49	1			T677	1		T551	1		T828	1
values[40]	45	1			T677	1		T551	1		T828	1
values[41]	48	1			T677	1		T551	1		T828	1
values[42]	53	1			T677	1		T551	1		T828	1
values[43]	50	1			T677	1		T551	1		T828	1
values[44]	47	1			T677	1		T551	1		T828	1
values[45]	46	1			T677	1		T551	1		T828	1
values[46]	46	1			T677	1		T551	1		T828	1
values[47]	51	1			T677	1		T551	1		T828	1
values[48]	63	1			T677	1		T551	1		T828	1
values[49]	52	1			T677	1		T551	1		T828	1
values[50]	62	1			T677	1		T551	1		T828	1
values[51]	57	1			T677	1		T551	1		T828	1
values[52]	63	1			T677	1		T551	1		T828	1
values[53]	61	1			T677	1		T551	1		T828	1
values[54]	58	1			T677	1		T551	1		T828	1
values[55]	60	1			T677	1		T551	1		T828	2
values[56]	57	1			T677	1		T551	1		T828	1
values[57]	61	1			T677	1		T551	1		T828	1
values[58]	52	1			T677	1		T551	1		T828	1
values[59]	58	1			T677	1		T551	1		T828	1
values[60]	58	1			T677	1		T551	1		T828	1
values[61]	62	1			T677	1		T551	1		T828	1
values[62]	68	1			T677	1		T551	1		T828	1
values[63]	73	1			T677	1		T551	1		T828	1
values[64]	64	1			T677	1		T551	1		T828	1
values[65]	58	1			T677	1		T551	1		T828	1
values[66]	65	1			T677	1		T551	1		T828	1
values[67]	59	1			T677	1		T551	1		T828	1
values[68]	48	1			T677	1		T551	1		T828	1
values[69]	50	1			T677	1		T551	1		T828	1
values[70]	66	1			T677	1		T551	1		T828	1
values[71]	57	1			T677	1		T551	1		T828	1
values[72]	52	1			T677	1		T551	1		T828	1
values[73]	55	1			T677	1		T551	1		T828	1
values[74]	66	1			T677	1		T551	1		T828	1
values[75]	76	1			T677	1		T551	1		T828	1
values[76]	65	1			T677	1		T551	1		T828	1
values[77]	56	1			T677	1		T551	1		T828	1
values[78]	58	1			T677	1		T551	1		T828	1
values[79]	61	1			T677	1		T551	1		T828	1
values[80]	79	1			T677	1		T551	1		T828	1
values[81]	87	1			T677	1		T551	1		T828	1
values[82]	74	1			T677	1		T551	2		T828	1
values[83]	105	1			T677	1		T551	7		T828	1
values[84]	95	1			T677	1		T551	2		T828	1
values[85]	87	1			T677	1		T551	1		T828	2
values[86]	78	1			T677	1		T551	4		T828	1
values[87]	76	1			T677	1		T551	2		T828	1
values[88]	78	1			T677	1		T551	2		T828	1
values[89]	72	1			T677	1		T551	2		T828	1
values[90]	75	1			T677	1		T551	4		T828	1
values[91]	81	1			T677	1		T551	2		T828	4
values[92]	84	1			T677	3		T551	5		T828	1
values[93]	83	1			T677	2		T551	6		T828	1
values[94]	76	1			T677	2		T551	2		T828	2
values[95]	75	1			T677	1		T551	1		T828	1
values[96]	64	1			T677	1		T551	2		T828	3
values[97]	81	1			T677	1		T551	1		T828	2
values[98]	91	1			T677	3		T551	2		T828	1
values[99]	82	1			T677	2		T551	2		T828	1
values[100]	85	1			T677	1		T551	4		T828	2
values[101]	78	1			T677	1		T551	2		T828	4
values[102]	81	1			T677	2		T551	2		T828	4
values[103]	82	1			T677	6		T551	1		T828	2
values[104]	99	1			T677	1		T551	6		T828	5
values[105]	102	1			T677	2		T551	4		T828	7
values[106]	98	1			T677	1		T551	4		T828	2
values[107]	92	1			T677	3		T551	2		T828	1
values[108]	98	1			T677	2		T551	2		T828	1
values[109]	133	1			T677	1		T551	2		T828	1
values[110]	117	1			T677	1		T551	4		T828	1
values[111]	92	1			T677	2		T551	1		T828	1
values[112]	113	1			T677	1		T551	2		T828	3
values[113]	78	1			T677	2		T551	1		T828	3
values[114]	85	1			T677	3		T551	2		T828	4
values[115]	88	1			T677	2		T551	1		T828	3
values[116]	100	1			T677	1		T551	2		T828	4
values[117]	109	1			T677	5		T551	1		T828	3
values[118]	95	1			T677	2		T551	1		T828	2
values[119]	108	1			T677	4		T551	1		T828	1
values[120]	97	1			T677	2		T551	1		T828	3
values[121]	97	1			T677	2		T551	2		T828	2
values[122]	115	1			T677	1		T551	1		T828	1
values[123]	126	1			T677	1		T551	2		T828	1
values[124]	255	1			T677	1		T551	1		T828	1
values[125]	402	1			T677	2		T551	1		T828	1
values[126]	679	1			T677	12		T551	12		T828	17
values[127]	2286	1			T677	130		T551	115		T828	104
values[128]	3954	1			T677	186		T551	229		T828	211