Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135353	1			T76	70		T77	720		T78	4
values[2]	9392	1			T76	4		T77	89		T79	3
values[3]	3604	1			T76	1		T77	24		T435	11
values[4]	2115	1			T77	8		T435	9		T520	4
values[5]	1418	1			T77	8		T435	7		T520	1
values[6]	1092	1			T77	11		T435	4		T816	17
values[7]	736	1			T77	5		T435	6		T816	10
values[8]	555	1			T77	4		T435	10		T816	11
values[9]	482	1			T77	9		T435	5		T816	1
values[10]	378	1			T77	9		T435	6		T428	10
values[11]	337	1			T77	5		T435	5		T428	10
values[12]	333	1			T77	6		T435	5		T428	10
values[13]	332	1			T77	19		T435	13		T428	23
values[14]	288	1			T77	7		T435	4		T428	13
values[15]	255	1			T77	8		T435	4		T428	16
values[16]	285	1			T77	11		T435	17		T428	26
values[17]	253	1			T77	3		T435	3		T428	11
values[18]	239	1			T77	2		T435	2		T428	13
values[19]	254	1			T77	5		T435	5		T428	15
values[20]	331	1			T77	5		T435	21		T428	14
values[21]	337	1			T77	5		T435	11		T428	19
values[22]	252	1			T77	8		T435	5		T428	37
values[23]	310	1			T77	7		T435	6		T428	12
values[24]	330	1			T77	11		T435	3		T428	12
values[25]	291	1			T77	23		T435	8		T428	17
values[26]	289	1			T77	4		T435	2		T428	15
values[27]	244	1			T77	6		T435	3		T428	8
values[28]	266	1			T77	3		T435	4		T428	14
values[29]	228	1			T77	4		T435	4		T428	12
values[30]	255	1			T77	4		T435	14		T428	23
values[31]	277	1			T77	8		T435	26		T428	10
values[32]	240	1			T77	3		T435	4		T428	7
values[33]	263	1			T77	6		T435	7		T428	12
values[34]	290	1			T77	4		T435	3		T428	26
values[35]	299	1			T77	4		T435	7		T428	39
values[36]	315	1			T77	6		T435	5		T428	12
values[37]	294	1			T77	10		T435	3		T428	12
values[38]	276	1			T77	11		T435	5		T428	13
values[39]	270	1			T77	22		T435	10		T428	14
values[40]	254	1			T77	11		T435	16		T428	18
values[41]	262	1			T77	15		T435	7		T428	17
values[42]	275	1			T77	4		T435	7		T428	12
values[43]	300	1			T77	7		T435	5		T428	15
values[44]	236	1			T77	5		T435	11		T428	10
values[45]	235	1			T77	4		T435	4		T428	21
values[46]	215	1			T77	4		T435	4		T428	21
values[47]	222	1			T77	6		T435	4		T428	10
values[48]	233	1			T77	6		T435	4		T428	6
values[49]	221	1			T77	7		T435	7		T428	18
values[50]	246	1			T77	5		T435	17		T428	16
values[51]	242	1			T77	4		T435	5		T428	28
values[52]	256	1			T77	7		T435	8		T428	14
values[53]	277	1			T77	5		T435	3		T428	26
values[54]	230	1			T77	16		T435	6		T428	12
values[55]	243	1			T77	9		T435	4		T428	12
values[56]	224	1			T77	4		T435	11		T428	14
values[57]	198	1			T77	6		T435	5		T428	19
values[58]	229	1			T77	6		T435	7		T428	14
values[59]	248	1			T77	4		T435	3		T428	21
values[60]	182	1			T435	7		T428	12		T646	5
values[61]	198	1			T435	4		T428	5		T454	6
values[62]	199	1			T435	7		T428	11		T454	6
values[63]	193	1			T435	5		T428	10		T454	18
values[64]	186	1			T435	10		T428	9		T454	9
values[65]	179	1			T435	10		T428	7		T454	3
values[66]	129	1			T435	6		T428	6		T480	1
values[67]	158	1			T435	11		T428	7		T480	2
values[68]	156	1			T435	5		T428	25		T480	1
values[69]	119	1			T435	5		T428	4		T480	1
values[70]	118	1			T435	3		T428	12		T480	1
values[71]	105	1			T435	5		T428	6		T480	1
values[72]	96	1			T435	4		T480	1		T837	1
values[73]	81	1			T480	1		T837	1		T838	1
values[74]	76	1			T480	1		T837	1		T838	1
values[75]	69	1			T480	1		T837	1		T838	1
values[76]	80	1			T480	1		T837	1		T838	1
values[77]	105	1			T480	1		T837	1		T838	1
values[78]	88	1			T480	1		T837	1		T838	1
values[79]	89	1			T480	1		T837	1		T838	1
values[80]	82	1			T480	1		T837	1		T838	1
values[81]	78	1			T480	1		T837	1		T838	1
values[82]	79	1			T480	1		T837	7		T838	1
values[83]	74	1			T480	1		T837	4		T838	1
values[84]	75	1			T480	1		T837	1		T838	1
values[85]	69	1			T480	1		T837	2		T838	1
values[86]	81	1			T480	1		T837	1		T838	1
values[87]	96	1			T480	1		T837	3		T838	1
values[88]	72	1			T480	1		T837	2		T838	1
values[89]	60	1			T480	1		T837	1		T838	1
values[90]	82	1			T480	1		T837	2		T838	1
values[91]	73	1			T480	1		T837	3		T838	1
values[92]	80	1			T480	1		T837	4		T838	1
values[93]	61	1			T480	1		T837	1		T838	1
values[94]	62	1			T480	1		T837	1		T838	1
values[95]	78	1			T480	1		T837	1		T838	1
values[96]	80	1			T480	1		T837	4		T838	1
values[97]	82	1			T480	1		T837	6		T838	1
values[98]	74	1			T480	1		T837	2		T838	1
values[99]	63	1			T480	1		T837	1		T838	1
values[100]	82	1			T480	1		T837	2		T838	1
values[101]	74	1			T480	1		T837	1		T838	1
values[102]	66	1			T480	1		T837	1		T838	1
values[103]	68	1			T480	1		T837	4		T838	1
values[104]	71	1			T480	1		T837	4		T838	1
values[105]	67	1			T480	1		T837	5		T838	1
values[106]	60	1			T480	1		T837	5		T838	1
values[107]	48	1			T480	1		T837	2		T838	1
values[108]	53	1			T480	1		T837	5		T838	1
values[109]	48	1			T480	1		T837	1		T838	1
values[110]	54	1			T480	1		T837	4		T838	1
values[111]	63	1			T480	1		T837	6		T838	1
values[112]	63	1			T480	1		T837	2		T838	1
values[113]	60	1			T480	1		T837	1		T838	1
values[114]	53	1			T480	1		T837	2		T838	1
values[115]	70	1			T480	1		T837	3		T838	1
values[116]	84	1			T480	1		T837	1		T838	1
values[117]	57	1			T480	1		T837	3		T838	1
values[118]	53	1			T480	3		T837	3		T838	3
values[119]	61	1			T480	3		T837	1		T838	2
values[120]	69	1			T480	2		T837	1		T838	5
values[121]	66	1			T480	1		T837	3		T838	1
values[122]	66	1			T480	1		T837	2		T838	1
values[123]	73	1			T480	1		T837	5		T838	2
values[124]	70	1			T480	1		T837	1		T838	4
values[125]	70	1			T480	1		T837	1		T838	2
values[126]	108	1			T480	1		T837	2		T838	3
values[127]	590	1			T480	34		T837	28		T838	32
values[128]	5122	1			T480	377		T837	243		T838	254