Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	134938	1			T76	60		T77	292		T78	3
values[2]	9952	1			T76	5		T77	1		T78	1
values[3]	3830	1			T456	1		T547	1		T428	3
values[4]	2112	1			T428	4		T826	1		T477	24
values[5]	1402	1			T428	7		T826	1		T477	13
values[6]	918	1			T428	8		T826	1		T477	18
values[7]	725	1			T428	6		T826	1		T477	13
values[8]	547	1			T428	4		T826	1		T477	13
values[9]	458	1			T428	6		T826	1		T477	10
values[10]	388	1			T428	8		T826	1		T477	12
values[11]	419	1			T428	3		T826	1		T477	6
values[12]	379	1			T428	8		T826	1		T477	3
values[13]	372	1			T428	7		T826	1		T477	6
values[14]	348	1			T428	7		T826	1		T477	5
values[15]	332	1			T428	5		T826	1		T477	10
values[16]	306	1			T428	4		T826	1		T477	5
values[17]	284	1			T428	4		T826	1		T477	4
values[18]	361	1			T428	6		T826	1		T477	2
values[19]	328	1			T428	6		T826	1		T477	2
values[20]	272	1			T428	22		T826	1		T477	2
values[21]	251	1			T428	3		T826	1		T566	2
values[22]	251	1			T428	5		T826	1		T566	2
values[23]	286	1			T428	6		T826	1		T566	2
values[24]	298	1			T428	10		T826	1		T566	1
values[25]	338	1			T428	12		T826	1		T566	1
values[26]	292	1			T428	11		T826	1		T566	1
values[27]	304	1			T428	8		T826	1		T566	3
values[28]	315	1			T428	4		T826	1		T566	3
values[29]	309	1			T428	6		T826	1		T566	2
values[30]	333	1			T428	9		T826	1		T566	1
values[31]	282	1			T428	8		T826	1		T566	1
values[32]	268	1			T428	3		T826	1		T566	4
values[33]	279	1			T428	4		T826	1		T566	2
values[34]	264	1			T428	3		T826	1		T566	1
values[35]	262	1			T428	7		T826	1		T566	2
values[36]	264	1			T428	9		T826	1		T566	1
values[37]	315	1			T428	4		T826	1		T566	2
values[38]	256	1			T428	5		T826	1		T566	1
values[39]	291	1			T428	6		T826	1		T566	2
values[40]	306	1			T428	14		T826	1		T566	3
values[41]	269	1			T428	21		T826	1		T566	1
values[42]	277	1			T428	19		T826	1		T566	3
values[43]	317	1			T428	6		T826	1		T566	20
values[44]	308	1			T428	11		T826	1		T566	11
values[45]	296	1			T428	5		T826	1		T566	5
values[46]	247	1			T428	1		T826	1		T566	13
values[47]	248	1			T826	1		T566	2		T646	7
values[48]	250	1			T826	1		T566	3		T646	16
values[49]	257	1			T826	1		T566	2		T646	3
values[50]	240	1			T826	1		T566	2		T646	3
values[51]	241	1			T826	1		T566	2		T646	13
values[52]	244	1			T826	1		T566	1		T646	8
values[53]	212	1			T826	1		T566	3		T646	5
values[54]	217	1			T826	1		T566	1		T454	2
values[55]	218	1			T826	1		T566	3		T454	2
values[56]	232	1			T826	1		T566	1		T454	2
values[57]	178	1			T826	1		T566	1		T454	4
values[58]	222	1			T826	1		T566	3		T454	5
values[59]	215	1			T826	1		T566	2		T454	3
values[60]	213	1			T826	1		T566	3		T454	11
values[61]	194	1			T826	1		T566	3		T454	9
values[62]	182	1			T826	1		T566	2		T454	6
values[63]	176	1			T826	1		T566	4		T454	1
values[64]	190	1			T826	1		T566	23		T454	4
values[65]	173	1			T826	1		T566	10		T454	4
values[66]	161	1			T826	1		T454	3		T480	1
values[67]	139	1			T826	1		T454	2		T480	1
values[68]	155	1			T826	1		T454	2		T480	1
values[69]	152	1			T826	1		T454	10		T480	1
values[70]	122	1			T826	1		T454	10		T480	1
values[71]	123	1			T826	1		T454	9		T480	1
values[72]	97	1			T826	1		T454	4		T480	1
values[73]	111	1			T826	1		T454	1		T480	1
values[74]	106	1			T826	1		T454	2		T480	1
values[75]	108	1			T826	1		T454	1		T480	1
values[76]	102	1			T826	1		T454	1		T480	1
values[77]	94	1			T826	1		T454	1		T480	1
values[78]	112	1			T826	1		T454	4		T480	1
values[79]	92	1			T826	1		T454	4		T480	1
values[80]	84	1			T826	1		T454	5		T480	1
values[81]	89	1			T826	1		T454	2		T480	1
values[82]	110	1			T826	1		T454	3		T480	1
values[83]	103	1			T826	1		T454	1		T480	1
values[84]	83	1			T826	1		T454	3		T480	1
values[85]	87	1			T826	1		T454	10		T480	1
values[86]	81	1			T826	1		T454	4		T480	1
values[87]	91	1			T826	1		T454	4		T480	1
values[88]	92	1			T826	1		T454	4		T480	1
values[89]	91	1			T826	1		T454	4		T480	1
values[90]	92	1			T826	1		T454	4		T480	1
values[91]	82	1			T826	1		T454	1		T480	1
values[92]	73	1			T826	1		T454	2		T480	1
values[93]	71	1			T826	1		T454	1		T480	1
values[94]	81	1			T826	1		T454	2		T480	1
values[95]	98	1			T826	1		T454	3		T480	1
values[96]	88	1			T826	1		T454	5		T480	1
values[97]	74	1			T826	1		T454	5		T480	1
values[98]	98	1			T826	1		T454	2		T480	1
values[99]	85	1			T826	1		T454	2		T480	1
values[100]	82	1			T826	1		T454	1		T480	1
values[101]	79	1			T826	1		T454	2		T480	1
values[102]	73	1			T826	1		T454	1		T480	1
values[103]	70	1			T826	1		T454	1		T480	1
values[104]	71	1			T826	1		T454	2		T480	1
values[105]	96	1			T826	1		T454	1		T480	1
values[106]	85	1			T826	1		T454	2		T480	1
values[107]	105	1			T826	1		T454	9		T480	1
values[108]	90	1			T826	1		T454	5		T480	1
values[109]	102	1			T826	1		T454	3		T480	1
values[110]	74	1			T826	1		T454	2		T480	1
values[111]	87	1			T826	2		T454	1		T480	1
values[112]	80	1			T826	1		T454	5		T480	1
values[113]	88	1			T826	5		T454	3		T480	1
values[114]	80	1			T826	3		T454	2		T480	1
values[115]	77	1			T826	6		T454	2		T480	1
values[116]	87	1			T826	3		T454	6		T480	1
values[117]	80	1			T826	1		T454	2		T480	3
values[118]	72	1			T826	1		T454	3		T480	3
values[119]	102	1			T826	2		T454	1		T480	2
values[120]	90	1			T826	1		T454	2		T480	1
values[121]	85	1			T826	2		T454	2		T480	5
values[122]	84	1			T826	6		T454	4		T480	2
values[123]	88	1			T826	3		T454	3		T480	1
values[124]	83	1			T826	1		T454	2		T480	1
values[125]	107	1			T826	4		T454	4		T480	3
values[126]	184	1			T826	2		T454	26		T480	2
values[127]	1024	1			T826	42		T454	65		T480	30
values[128]	7593	1			T826	312		T454	40		T480	377