Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.gpio_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135852	1			T73	5		T74	87		T75	3
values[2]	11512	1			T74	12		T128	68		T536	2
values[3]	4559	1			T128	58		T536	2		T537	45
values[4]	2537	1			T128	41		T536	2		T537	35
values[5]	1554	1			T128	46		T536	2		T537	40
values[6]	992	1			T128	36		T536	2		T537	15
values[7]	669	1			T128	18		T536	2		T537	2
values[8]	623	1			T128	19		T536	2		T640	2
values[9]	543	1			T128	20		T536	2		T640	4
values[10]	368	1			T128	35		T536	2		T640	3
values[11]	364	1			T128	24		T536	2		T640	6
values[12]	356	1			T128	23		T536	2		T640	3
values[13]	373	1			T128	23		T536	2		T640	4
values[14]	333	1			T128	18		T536	2		T640	1
values[15]	373	1			T128	8		T536	2		T640	3
values[16]	326	1			T128	2		T536	2		T640	4
values[17]	307	1			T536	2		T640	2		T637	5
values[18]	322	1			T536	2		T640	3		T637	6
values[19]	325	1			T536	2		T640	1		T637	11
values[20]	318	1			T536	2		T640	2		T637	15
values[21]	325	1			T536	2		T640	1		T637	6
values[22]	295	1			T536	2		T640	3		T637	3
values[23]	321	1			T536	2		T640	3		T637	7
values[24]	309	1			T536	2		T640	3		T637	10
values[25]	340	1			T536	2		T640	4		T637	15
values[26]	324	1			T536	2		T640	5		T637	6
values[27]	268	1			T536	2		T640	1		T637	3
values[28]	293	1			T536	2		T640	3		T637	3
values[29]	278	1			T536	2		T640	4		T637	4
values[30]	294	1			T536	2		T640	3		T637	8
values[31]	272	1			T536	2		T640	1		T637	5
values[32]	266	1			T536	2		T640	4		T637	5
values[33]	319	1			T536	2		T640	6		T637	4
values[34]	309	1			T536	2		T640	2		T637	7
values[35]	365	1			T536	2		T640	1		T637	10
values[36]	283	1			T536	2		T640	3		T637	5
values[37]	256	1			T536	2		T640	2		T637	7
values[38]	309	1			T536	2		T640	1		T637	8
values[39]	297	1			T536	2		T640	3		T637	23
values[40]	261	1			T536	2		T640	1		T637	7
values[41]	253	1			T536	2		T640	2		T637	5
values[42]	269	1			T536	2		T640	2		T637	8
values[43]	331	1			T536	3		T640	2		T637	4
values[44]	306	1			T536	2		T640	5		T637	8
values[45]	259	1			T536	2		T640	2		T637	7
values[46]	254	1			T536	2		T640	1		T637	3
values[47]	282	1			T536	2		T640	1		T637	5
values[48]	268	1			T536	2		T640	3		T637	9
values[49]	247	1			T536	2		T640	3		T637	9
values[50]	233	1			T536	2		T640	1		T637	7
values[51]	238	1			T536	2		T640	2		T637	16
values[52]	251	1			T536	2		T640	2		T637	7
values[53]	213	1			T536	2		T640	3		T637	10
values[54]	231	1			T536	3		T640	1		T637	7
values[55]	244	1			T536	2		T640	3		T637	8
values[56]	248	1			T536	2		T640	2		T637	5
values[57]	278	1			T536	2		T640	1		T637	13
values[58]	210	1			T536	2		T640	3		T637	6
values[59]	203	1			T536	2		T640	7		T637	6
values[60]	166	1			T536	2		T640	4		T872	1
values[61]	197	1			T536	2		T640	6		T872	1
values[62]	183	1			T536	2		T640	4		T872	1
values[63]	138	1			T536	2		T640	6		T872	1
values[64]	159	1			T536	2		T640	10		T872	1
values[65]	163	1			T536	2		T640	10		T872	1
values[66]	157	1			T536	2		T640	10		T872	1
values[67]	154	1			T536	2		T640	6		T872	1
values[68]	132	1			T536	2		T640	2		T872	1
values[69]	109	1			T536	2		T640	5		T872	1
values[70]	166	1			T536	2		T640	13		T872	1
values[71]	101	1			T536	2		T640	13		T872	1
values[72]	82	1			T536	2		T640	14		T872	1
values[73]	77	1			T536	2		T640	10		T872	1
values[74]	83	1			T536	2		T640	7		T872	1
values[75]	82	1			T536	2		T640	7		T872	1
values[76]	78	1			T536	2		T640	3		T872	1
values[77]	83	1			T536	2		T640	3		T872	1
values[78]	82	1			T536	2		T640	5		T872	1
values[79]	82	1			T536	2		T640	2		T872	1
values[80]	88	1			T536	2		T640	8		T872	1
values[81]	81	1			T536	2		T640	7		T872	1
values[82]	70	1			T536	2		T640	2		T872	1
values[83]	98	1			T536	4		T640	6		T872	1
values[84]	112	1			T536	12		T640	7		T872	1
values[85]	92	1			T536	5		T640	10		T872	1
values[86]	84	1			T536	2		T640	3		T872	1
values[87]	115	1			T536	5		T640	3		T872	4
values[88]	100	1			T536	6		T640	3		T872	4
values[89]	92	1			T536	3		T640	5		T872	1
values[90]	90	1			T536	3		T640	8		T872	3
values[91]	99	1			T536	3		T640	8		T872	7
values[92]	95	1			T536	3		T640	5		T872	5
values[93]	91	1			T536	3		T640	4		T872	7
values[94]	112	1			T536	4		T640	1		T872	3
values[95]	101	1			T536	2		T640	5		T872	3
values[96]	86	1			T536	2		T640	5		T872	2
values[97]	112	1			T536	3		T640	5		T872	4
values[98]	105	1			T536	2		T640	3		T872	2
values[99]	101	1			T536	4		T640	5		T872	3
values[100]	120	1			T536	7		T640	2		T872	1
values[101]	101	1			T536	3		T640	4		T872	1
values[102]	131	1			T536	6		T640	7		T872	4
values[103]	113	1			T536	11		T640	3		T872	5
values[104]	96	1			T536	5		T640	8		T872	3
values[105]	83	1			T536	4		T640	1		T872	1
values[106]	96	1			T536	5		T640	3		T872	1
values[107]	114	1			T536	3		T640	12		T872	4
values[108]	108	1			T536	2		T640	9		T872	1
values[109]	95	1			T536	5		T640	8		T872	2
values[110]	103	1			T536	3		T640	6		T872	7
values[111]	81	1			T536	6		T640	2		T872	5
values[112]	99	1			T536	3		T872	1		T866	1
values[113]	93	1			T536	5		T872	3		T866	1
values[114]	83	1			T536	6		T872	2		T866	1
values[115]	87	1			T536	2		T872	3		T866	1
values[116]	79	1			T536	3		T872	3		T866	1
values[117]	83	1			T536	5		T872	1		T866	1
values[118]	99	1			T536	7		T872	1		T866	5
values[119]	119	1			T536	5		T872	6		T866	2
values[120]	82	1			T536	6		T872	3		T866	1
values[121]	94	1			T536	16		T872	2		T866	7
values[122]	71	1			T536	3		T872	3		T866	1
values[123]	83	1			T536	2		T872	1		T866	4
values[124]	76	1			T536	3		T872	3		T866	1
values[125]	91	1			T536	6		T872	1		T866	1
values[126]	126	1			T536	3		T872	3		T866	4
values[127]	1030	1			T536	54		T872	23		T866	31
values[128]	8955	1			T536	485		T872	304		T866	295