Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c2_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	134746	1			T73	10		T74	77		T75	11
values[2]	10574	1			T74	5		T75	1		T128	21
values[3]	4101	1			T128	16		T541	1		T549	105
values[4]	2505	1			T128	23		T541	1		T549	70
values[5]	1616	1			T128	32		T541	1		T549	45
values[6]	1073	1			T128	21		T541	1		T549	13
values[7]	847	1			T128	11		T541	1		T855	2
values[8]	653	1			T128	19		T541	1		T855	2
values[9]	521	1			T128	15		T541	1		T855	2
values[10]	493	1			T128	19		T541	1		T855	2
values[11]	383	1			T128	17		T541	1		T855	2
values[12]	389	1			T128	8		T541	1		T855	2
values[13]	380	1			T128	7		T541	1		T855	2
values[14]	382	1			T128	11		T541	1		T855	2
values[15]	337	1			T128	6		T541	1		T855	2
values[16]	356	1			T128	6		T541	1		T855	2
values[17]	372	1			T128	1		T541	1		T855	2
values[18]	363	1			T128	1		T541	1		T855	2
values[19]	365	1			T128	2		T541	1		T855	2
values[20]	311	1			T128	3		T541	1		T855	2
values[21]	291	1			T128	3		T541	1		T855	3
values[22]	356	1			T128	5		T541	1		T855	2
values[23]	325	1			T128	5		T541	1		T855	2
values[24]	297	1			T128	1		T541	1		T855	2
values[25]	362	1			T541	1		T855	2		T857	1
values[26]	343	1			T541	1		T855	2		T857	1
values[27]	308	1			T541	1		T855	2		T857	1
values[28]	295	1			T541	1		T855	2		T857	1
values[29]	277	1			T541	1		T855	2		T857	1
values[30]	303	1			T541	1		T855	2		T857	1
values[31]	242	1			T541	1		T855	2		T857	1
values[32]	280	1			T541	1		T855	2		T857	1
values[33]	286	1			T541	1		T855	2		T857	1
values[34]	296	1			T541	1		T855	2		T857	1
values[35]	252	1			T541	1		T855	2		T857	1
values[36]	269	1			T541	1		T855	2		T857	1
values[37]	296	1			T541	1		T855	2		T857	1
values[38]	326	1			T541	1		T855	2		T857	1
values[39]	316	1			T541	1		T855	2		T857	1
values[40]	290	1			T541	1		T855	2		T857	1
values[41]	260	1			T541	1		T855	2		T857	1
values[42]	317	1			T541	1		T855	2		T857	1
values[43]	319	1			T541	1		T855	2		T857	1
values[44]	360	1			T541	1		T855	2		T857	1
values[45]	276	1			T541	1		T855	2		T857	1
values[46]	285	1			T541	1		T855	2		T857	1
values[47]	274	1			T541	1		T855	2		T857	1
values[48]	276	1			T541	1		T855	2		T857	1
values[49]	248	1			T541	1		T855	2		T857	1
values[50]	276	1			T541	1		T855	2		T857	1
values[51]	259	1			T541	1		T855	2		T857	1
values[52]	275	1			T541	1		T855	2		T857	1
values[53]	257	1			T541	1		T855	2		T857	1
values[54]	271	1			T541	1		T855	2		T857	1
values[55]	285	1			T541	1		T855	2		T857	1
values[56]	226	1			T541	1		T855	2		T857	1
values[57]	210	1			T541	1		T855	2		T857	1
values[58]	236	1			T541	1		T855	2		T857	1
values[59]	216	1			T541	1		T855	2		T857	1
values[60]	173	1			T541	1		T855	2		T857	1
values[61]	171	1			T541	1		T855	2		T857	1
values[62]	137	1			T541	1		T855	2		T857	1
values[63]	144	1			T541	1		T855	2		T857	1
values[64]	157	1			T541	1		T855	2		T857	1
values[65]	143	1			T541	1		T855	2		T857	1
values[66]	139	1			T541	1		T855	2		T857	1
values[67]	147	1			T541	1		T855	2		T857	1
values[68]	135	1			T541	1		T855	2		T857	1
values[69]	132	1			T541	1		T855	2		T857	1
values[70]	129	1			T541	1		T855	2		T857	1
values[71]	139	1			T541	1		T855	2		T857	1
values[72]	117	1			T541	1		T855	2		T857	1
values[73]	127	1			T541	1		T855	2		T857	1
values[74]	149	1			T541	1		T855	2		T857	1
values[75]	96	1			T541	1		T855	2		T857	1
values[76]	110	1			T541	1		T855	2		T857	1
values[77]	124	1			T541	1		T855	2		T857	1
values[78]	104	1			T541	1		T855	2		T857	1
values[79]	92	1			T541	1		T855	2		T857	1
values[80]	66	1			T541	1		T855	2		T857	1
values[81]	84	1			T541	1		T855	2		T857	1
values[82]	77	1			T541	1		T855	2		T857	1
values[83]	90	1			T541	1		T855	2		T857	1
values[84]	73	1			T541	1		T855	2		T857	1
values[85]	72	1			T541	1		T855	2		T857	1
values[86]	89	1			T541	1		T855	2		T857	1
values[87]	81	1			T541	2		T855	3		T857	1
values[88]	69	1			T541	1		T855	2		T857	1
values[89]	67	1			T541	1		T855	2		T857	1
values[90]	72	1			T541	1		T855	2		T857	1
values[91]	91	1			T541	1		T855	2		T857	1
values[92]	71	1			T541	1		T855	2		T857	1
values[93]	65	1			T541	1		T855	2		T857	3
values[94]	77	1			T541	1		T855	2		T857	8
values[95]	80	1			T541	1		T855	2		T857	2
values[96]	83	1			T541	1		T855	2		T857	6
values[97]	75	1			T541	1		T855	4		T857	3
values[98]	72	1			T541	1		T855	5		T857	2
values[99]	91	1			T541	1		T855	8		T857	3
values[100]	77	1			T541	1		T855	5		T857	2
values[101]	91	1			T541	1		T855	5		T857	1
values[102]	88	1			T541	6		T855	5		T857	1
values[103]	73	1			T541	1		T855	3		T857	4
values[104]	98	1			T541	6		T855	2		T857	1
values[105]	71	1			T541	1		T855	2		T857	1
values[106]	83	1			T541	3		T855	2		T857	2
values[107]	77	1			T541	1		T855	2		T857	3
values[108]	70	1			T541	1		T855	3		T857	4
values[109]	86	1			T541	2		T855	6		T857	3
values[110]	66	1			T541	3		T855	3		T857	2
values[111]	70	1			T541	5		T855	5		T857	2
values[112]	69	1			T541	3		T855	9		T857	3
values[113]	61	1			T541	4		T855	3		T857	4
values[114]	72	1			T541	3		T855	3		T857	4
values[115]	78	1			T541	1		T855	5		T857	1
values[116]	67	1			T541	2		T855	5		T857	1
values[117]	47	1			T541	2		T855	3		T857	1
values[118]	69	1			T541	1		T855	3		T857	8
values[119]	50	1			T541	1		T855	3		T857	1
values[120]	63	1			T541	1		T855	5		T857	3
values[121]	46	1			T541	1		T855	5		T857	1
values[122]	63	1			T541	2		T855	5		T857	3
values[123]	63	1			T541	1		T855	3		T857	3
values[124]	78	1			T541	3		T855	4		T857	2
values[125]	69	1			T541	1		T855	4		T857	1
values[126]	101	1			T541	4		T855	5		T857	2
values[127]	827	1			T541	41		T855	57		T857	27
values[128]	7181	1			T541	286		T855	493		T857	306