Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rom_ctrl__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	146549	1			T73	6		T74	91		T75	10
values[2]	5276	1			T74	5		T75	1		T128	3
values[3]	2927	1			T74	1		T536	2		T441	1
values[4]	2160	1			T536	2		T640	6		T418	48
values[5]	1758	1			T536	2		T640	4		T418	15
values[6]	1459	1			T536	2		T640	5		T418	3
values[7]	1222	1			T536	2		T640	6		T418	3
values[8]	956	1			T536	2		T640	18		T860	3
values[9]	709	1			T536	2		T640	51		T860	5
values[10]	537	1			T536	2		T640	37		T860	2
values[11]	531	1			T536	2		T640	42		T860	1
values[12]	529	1			T536	2		T640	9		T860	1
values[13]	430	1			T536	2		T640	14		T860	1
values[14]	378	1			T536	2		T640	9		T860	4
values[15]	404	1			T536	2		T640	14		T860	4
values[16]	439	1			T536	2		T640	15		T860	2
values[17]	336	1			T536	2		T640	18		T860	2
values[18]	335	1			T536	2		T640	10		T860	1
values[19]	329	1			T536	2		T640	11		T860	1
values[20]	305	1			T536	2		T640	12		T860	1
values[21]	309	1			T536	2		T640	13		T860	1
values[22]	281	1			T536	2		T640	12		T860	7
values[23]	241	1			T536	2		T640	4		T860	2
values[24]	215	1			T536	2		T640	5		T860	2
values[25]	214	1			T536	2		T640	4		T860	2
values[26]	174	1			T536	2		T640	11		T860	2
values[27]	147	1			T536	2		T640	11		T860	2
values[28]	127	1			T536	2		T640	5		T860	3
values[29]	125	1			T536	2		T640	13		T860	3
values[30]	134	1			T536	2		T640	7		T860	4
values[31]	145	1			T536	2		T640	8		T860	3
values[32]	123	1			T536	2		T640	11		T860	5
values[33]	100	1			T536	2		T640	13		T860	3
values[34]	111	1			T536	2		T640	18		T860	1
values[35]	94	1			T536	2		T640	4		T860	2
values[36]	96	1			T536	2		T640	5		T860	1
values[37]	131	1			T536	2		T640	1		T860	2
values[38]	112	1			T536	2		T640	1		T860	6
values[39]	90	1			T536	2		T640	7		T860	4
values[40]	108	1			T536	2		T640	6		T860	5
values[41]	113	1			T536	2		T640	10		T860	4
values[42]	72	1			T536	2		T640	11		T860	1
values[43]	90	1			T536	2		T640	22		T860	3
values[44]	82	1			T536	2		T640	14		T860	2
values[45]	76	1			T536	2		T640	7		T860	3
values[46]	66	1			T536	2		T640	4		T860	4
values[47]	45	1			T536	2		T860	1		T866	1
values[48]	40	1			T536	2		T860	2		T866	1
values[49]	44	1			T536	2		T860	1		T866	1
values[50]	40	1			T536	2		T860	1		T866	1
values[51]	47	1			T536	2		T860	4		T866	2
values[52]	71	1			T536	2		T860	1		T866	1
values[53]	54	1			T536	2		T860	1		T866	1
values[54]	47	1			T536	2		T860	4		T866	1
values[55]	40	1			T536	2		T860	5		T866	1
values[56]	39	1			T536	2		T860	5		T866	1
values[57]	36	1			T536	2		T860	3		T866	1
values[58]	40	1			T536	2		T860	5		T866	1
values[59]	43	1			T536	2		T860	3		T866	1
values[60]	40	1			T536	2		T860	2		T866	1
values[61]	39	1			T536	2		T860	2		T866	1
values[62]	42	1			T536	2		T860	2		T866	1
values[63]	45	1			T536	2		T860	2		T866	1
values[64]	41	1			T536	2		T860	4		T866	1
values[65]	40	1			T536	2		T860	2		T866	1
values[66]	37	1			T536	2		T860	4		T866	1
values[67]	36	1			T536	2		T860	3		T866	1
values[68]	35	1			T536	2		T860	2		T866	1
values[69]	32	1			T536	2		T860	1		T866	1
values[70]	40	1			T536	2		T860	3		T866	1
values[71]	40	1			T536	2		T860	3		T866	1
values[72]	56	1			T536	2		T860	11		T866	1
values[73]	40	1			T536	2		T860	11		T866	1
values[74]	37	1			T536	2		T860	8		T866	1
values[75]	51	1			T536	3		T860	10		T866	1
values[76]	45	1			T536	2		T860	5		T866	1
values[77]	43	1			T536	2		T860	14		T866	1
values[78]	48	1			T536	2		T860	12		T866	2
values[79]	54	1			T536	2		T860	7		T866	2
values[80]	63	1			T536	2		T860	7		T866	7
values[81]	60	1			T536	2		T860	2		T866	14
values[82]	60	1			T536	2		T860	3		T866	5
values[83]	53	1			T536	2		T860	2		T866	2
values[84]	58	1			T536	2		T860	2		T866	4
values[85]	46	1			T536	2		T860	2		T866	2
values[86]	51	1			T536	2		T860	2		T866	2
values[87]	57	1			T536	2		T860	4		T866	1
values[88]	50	1			T536	2		T860	5		T866	1
values[89]	63	1			T536	2		T860	3		T866	1
values[90]	57	1			T536	2		T860	8		T866	2
values[91]	56	1			T536	2		T860	8		T866	3
values[92]	58	1			T536	2		T860	6		T866	3
values[93]	55	1			T536	2		T860	3		T866	5
values[94]	42	1			T536	3		T860	1		T866	2
values[95]	46	1			T536	2		T860	4		T866	3
values[96]	57	1			T536	2		T860	3		T866	1
values[97]	52	1			T536	2		T860	4		T866	1
values[98]	59	1			T536	2		T860	5		T866	1
values[99]	50	1			T536	2		T860	6		T866	2
values[100]	52	1			T536	2		T860	4		T866	2
values[101]	56	1			T536	2		T860	2		T866	1
values[102]	56	1			T536	2		T860	4		T866	1
values[103]	54	1			T536	2		T860	4		T866	2
values[104]	58	1			T536	2		T860	4		T866	2
values[105]	59	1			T536	2		T860	6		T866	1
values[106]	58	1			T536	2		T860	4		T866	1
values[107]	61	1			T536	3		T860	5		T866	1
values[108]	65	1			T536	2		T860	3		T866	1
values[109]	64	1			T536	2		T860	1		T866	3
values[110]	57	1			T536	2		T860	2		T866	4
values[111]	72	1			T536	2		T860	7		T866	1
values[112]	75	1			T536	2		T860	4		T866	1
values[113]	72	1			T536	2		T860	8		T866	3
values[114]	68	1			T536	2		T860	6		T866	2
values[115]	71	1			T536	2		T860	3		T866	1
values[116]	63	1			T536	2		T860	6		T866	1
values[117]	55	1			T536	2		T860	3		T866	3
values[118]	67	1			T536	2		T860	8		T866	3
values[119]	63	1			T536	2		T860	6		T866	3
values[120]	67	1			T536	2		T860	7		T866	3
values[121]	80	1			T536	2		T860	3		T866	3
values[122]	84	1			T536	2		T860	6		T866	2
values[123]	79	1			T536	2		T860	10		T866	1
values[124]	134	1			T536	2		T860	7		T866	3
values[125]	230	1			T536	5		T860	3		T866	3
values[126]	608	1			T536	26		T860	21		T866	20
values[127]	2430	1			T536	209		T860	14		T866	114
values[128]	4509	1			T536	487		T860	1		T866	173