Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cfg_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	151584	1			T73	5		T74	86		T75	10
values[2]	4122	1			T74	6		T75	1		T128	35
values[3]	1781	1			T128	9		T631	1		T420	28
values[4]	1283	1			T128	5		T420	5		T745	7
values[5]	969	1			T128	2		T745	6		T746	26
values[6]	726	1			T745	7		T746	29		T865	6
values[7]	608	1			T745	8		T746	46		T865	5
values[8]	548	1			T745	5		T746	49		T865	7
values[9]	484	1			T745	3		T746	30		T865	12
values[10]	445	1			T745	8		T746	27		T865	6
values[11]	471	1			T745	5		T746	28		T865	9
values[12]	397	1			T745	5		T746	32		T865	8
values[13]	364	1			T745	6		T746	32		T865	7
values[14]	344	1			T745	7		T746	31		T865	1
values[15]	386	1			T745	6		T746	49		T586	6
values[16]	393	1			T745	8		T746	60		T586	9
values[17]	398	1			T745	11		T746	58		T586	11
values[18]	362	1			T745	9		T746	45		T586	7
values[19]	354	1			T745	5		T746	25		T586	9
values[20]	326	1			T745	5		T746	35		T586	7
values[21]	335	1			T745	13		T746	22		T586	13
values[22]	306	1			T745	8		T746	11		T586	7
values[23]	274	1			T745	9		T746	18		T586	7
values[24]	224	1			T745	6		T746	9		T586	7
values[25]	209	1			T745	5		T746	4		T586	7
values[26]	215	1			T745	4		T746	8		T586	10
values[27]	181	1			T745	4		T746	4		T586	6
values[28]	176	1			T745	2		T746	6		T586	6
values[29]	146	1			T745	4		T746	8		T586	7
values[30]	114	1			T745	6		T746	5		T586	4
values[31]	134	1			T745	4		T746	16		T586	3
values[32]	122	1			T745	2		T746	8		T586	12
values[33]	165	1			T745	7		T746	3		T586	5
values[34]	166	1			T745	9		T586	4		T880	1
values[35]	176	1			T745	11		T586	5		T880	1
values[36]	171	1			T745	3		T586	8		T880	1
values[37]	133	1			T745	6		T586	9		T880	1
values[38]	107	1			T745	5		T586	6		T880	1
values[39]	117	1			T745	5		T586	6		T880	1
values[40]	92	1			T745	8		T586	5		T880	1
values[41]	95	1			T745	7		T586	6		T880	1
values[42]	84	1			T745	3		T586	7		T880	1
values[43]	74	1			T745	5		T586	5		T880	1
values[44]	87	1			T745	11		T586	7		T880	1
values[45]	86	1			T745	20		T586	11		T880	1
values[46]	69	1			T745	7		T586	7		T880	1
values[47]	69	1			T745	6		T586	6		T880	1
values[48]	56	1			T745	3		T586	8		T880	1
values[49]	59	1			T745	4		T586	5		T880	1
values[50]	75	1			T745	6		T586	14		T880	1
values[51]	75	1			T745	4		T586	6		T880	1
values[52]	69	1			T745	2		T586	8		T880	1
values[53]	78	1			T745	10		T586	7		T880	1
values[54]	77	1			T745	12		T586	8		T880	1
values[55]	64	1			T745	10		T586	7		T880	1
values[56]	75	1			T745	8		T586	5		T880	1
values[57]	67	1			T745	2		T586	10		T880	1
values[58]	68	1			T745	3		T586	13		T880	1
values[59]	83	1			T745	4		T586	5		T880	1
values[60]	73	1			T745	3		T586	7		T880	1
values[61]	71	1			T745	5		T586	8		T880	1
values[62]	60	1			T745	4		T586	12		T880	1
values[63]	59	1			T745	4		T586	5		T880	1
values[64]	53	1			T745	3		T586	4		T880	1
values[65]	71	1			T745	3		T586	5		T880	1
values[66]	64	1			T745	5		T586	8		T880	1
values[67]	69	1			T745	7		T586	5		T880	1
values[68]	75	1			T745	7		T586	10		T880	1
values[69]	70	1			T745	5		T586	7		T880	1
values[70]	63	1			T745	7		T586	9		T880	1
values[71]	53	1			T745	5		T586	4		T880	1
values[72]	63	1			T745	6		T586	6		T880	1
values[73]	63	1			T745	8		T586	8		T880	1
values[74]	59	1			T745	3		T586	8		T880	1
values[75]	60	1			T745	4		T586	5		T880	1
values[76]	63	1			T745	4		T586	5		T880	1
values[77]	89	1			T745	3		T586	5		T880	2
values[78]	88	1			T745	4		T586	5		T880	4
values[79]	68	1			T745	2		T586	7		T880	2
values[80]	78	1			T745	7		T586	3		T880	2
values[81]	94	1			T745	7		T586	9		T880	7
values[82]	84	1			T745	7		T586	3		T880	5
values[83]	88	1			T745	12		T586	11		T880	2
values[84]	75	1			T745	2		T586	10		T880	3
values[85]	67	1			T745	6		T586	6		T880	2
values[86]	60	1			T745	4		T586	10		T880	2
values[87]	73	1			T745	7		T586	6		T880	1
values[88]	68	1			T745	3		T586	7		T880	2
values[89]	83	1			T745	4		T586	13		T880	5
values[90]	92	1			T745	5		T586	10		T880	6
values[91]	83	1			T745	9		T586	7		T880	4
values[92]	93	1			T745	4		T586	12		T880	8
values[93]	87	1			T745	6		T586	12		T880	5
values[94]	77	1			T745	3		T586	8		T880	1
values[95]	81	1			T745	11		T586	6		T880	2
values[96]	95	1			T745	5		T586	6		T880	1
values[97]	89	1			T745	8		T586	6		T880	3
values[98]	83	1			T745	7		T586	4		T880	2
values[99]	81	1			T745	4		T586	8		T880	1
values[100]	100	1			T745	7		T586	10		T880	2
values[101]	85	1			T745	8		T586	4		T880	2
values[102]	84	1			T745	7		T586	7		T880	2
values[103]	84	1			T745	6		T586	7		T880	1
values[104]	112	1			T745	7		T586	12		T880	2
values[105]	95	1			T745	9		T586	7		T880	3
values[106]	101	1			T745	9		T586	10		T880	2
values[107]	103	1			T745	5		T586	11		T880	1
values[108]	125	1			T745	3		T586	4		T880	1
values[109]	107	1			T745	7		T586	7		T880	1
values[110]	117	1			T745	8		T586	8		T880	3
values[111]	112	1			T745	10		T586	16		T880	2
values[112]	113	1			T745	10		T586	13		T880	2
values[113]	126	1			T745	17		T586	14		T880	2
values[114]	123	1			T745	13		T586	13		T880	3
values[115]	102	1			T745	20		T586	5		T880	2
values[116]	113	1			T745	8		T586	18		T880	3
values[117]	130	1			T745	11		T586	23		T880	2
values[118]	144	1			T745	19		T586	21		T880	6
values[119]	120	1			T745	13		T586	13		T880	3
values[120]	109	1			T745	12		T586	10		T880	4
values[121]	129	1			T745	15		T586	10		T880	7
values[122]	146	1			T745	10		T586	6		T880	4
values[123]	163	1			T745	6		T586	20		T880	2
values[124]	281	1			T745	3		T586	53		T880	4
values[125]	575	1			T745	3		T586	144		T880	6
values[126]	1105	1			T745	1		T586	215		T880	49
values[127]	3000	1			T586	106		T880	118		T672	26
values[128]	4869	1			T586	11		T880	156		T672	5