Summary for Variable cp_req_dly
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for cp_req_dly
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
big_delay |
500 |
1 |
|
|
T252 |
1 |
|
T472 |
1 |
|
T473 |
1 |
small_delay |
676 |
1 |
|
|
T82 |
1 |
|
T86 |
1 |
|
T559 |
1 |
zero |
624 |
1 |
|
|
T80 |
1 |
|
T81 |
1 |
|
T253 |
1 |
Summary for Variable cp_rsp_dly
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for cp_rsp_dly
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
big_delay |
200 |
1 |
|
|
T252 |
1 |
|
T575 |
1 |
|
T576 |
1 |
small_delay |
976 |
1 |
|
|
T82 |
1 |
|
T86 |
1 |
|
T472 |
1 |
zero |
624 |
1 |
|
|
T80 |
1 |
|
T81 |
1 |
|
T253 |
1 |
0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |