Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	129940	1			T73	137		T74	4		T78	17
values[2]	8400	1			T73	2		T262	1		T549	2
values[3]	3418	1			T557	1		T434	2		T836	1
values[4]	2007	1			T557	1		T836	1		T551	27
values[5]	1251	1			T836	1		T551	20		T496	20
values[6]	989	1			T836	1		T551	22		T496	22
values[7]	775	1			T836	1		T551	18		T496	31
values[8]	565	1			T836	1		T551	20		T496	30
values[9]	474	1			T836	1		T551	16		T496	31
values[10]	489	1			T836	1		T551	14		T496	16
values[11]	448	1			T836	1		T551	36		T496	33
values[12]	416	1			T836	1		T551	26		T496	19
values[13]	377	1			T836	1		T551	14		T496	17
values[14]	302	1			T836	1		T551	14		T496	16
values[15]	358	1			T836	1		T551	24		T496	19
values[16]	396	1			T836	1		T551	39		T496	24
values[17]	348	1			T836	1		T551	25		T496	18
values[18]	346	1			T836	1		T551	29		T496	20
values[19]	362	1			T836	1		T551	28		T496	24
values[20]	295	1			T836	1		T551	14		T496	14
values[21]	366	1			T836	1		T551	22		T496	19
values[22]	327	1			T836	1		T551	14		T496	40
values[23]	309	1			T836	1		T551	23		T496	29
values[24]	292	1			T836	1		T551	13		T496	11
values[25]	295	1			T836	1		T551	18		T496	16
values[26]	328	1			T836	1		T551	36		T496	21
values[27]	320	1			T836	1		T551	29		T496	16
values[28]	330	1			T836	1		T551	44		T496	28
values[29]	320	1			T836	1		T551	24		T496	30
values[30]	280	1			T836	1		T551	23		T496	18
values[31]	257	1			T836	1		T551	22		T496	15
values[32]	313	1			T836	1		T551	12		T496	30
values[33]	324	1			T836	1		T551	13		T496	27
values[34]	288	1			T836	1		T551	17		T496	17
values[35]	325	1			T836	1		T551	30		T496	16
values[36]	252	1			T836	1		T551	14		T496	21
values[37]	284	1			T836	1		T551	21		T496	19
values[38]	281	1			T836	1		T551	27		T496	16
values[39]	313	1			T836	1		T551	23		T496	22
values[40]	318	1			T836	1		T551	23		T496	28
values[41]	258	1			T836	1		T551	17		T496	15
values[42]	314	1			T836	1		T551	28		T496	19
values[43]	316	1			T836	1		T551	42		T496	15
values[44]	322	1			T836	1		T551	19		T496	21
values[45]	286	1			T836	1		T551	22		T496	20
values[46]	303	1			T836	1		T551	14		T496	37
values[47]	291	1			T836	1		T551	20		T496	26
values[48]	310	1			T836	1		T551	18		T496	32
values[49]	327	1			T836	1		T551	33		T496	32
values[50]	253	1			T836	2		T551	23		T496	13
values[51]	243	1			T836	1		T551	19		T496	14
values[52]	264	1			T836	1		T551	32		T496	22
values[53]	284	1			T836	1		T551	12		T496	22
values[54]	267	1			T836	1		T551	18		T496	14
values[55]	278	1			T836	1		T551	16		T496	16
values[56]	282	1			T836	1		T551	25		T496	19
values[57]	269	1			T836	1		T551	19		T496	17
values[58]	253	1			T836	1		T551	31		T496	18
values[59]	224	1			T836	1		T551	22		T496	18
values[60]	226	1			T836	1		T551	24		T496	16
values[61]	260	1			T836	1		T551	36		T496	24
values[62]	236	1			T836	1		T551	31		T496	40
values[63]	249	1			T836	1		T551	21		T496	56
values[64]	205	1			T836	1		T551	31		T496	20
values[65]	231	1			T836	1		T551	21		T496	24
values[66]	202	1			T836	1		T551	22		T496	30
values[67]	178	1			T836	1		T551	5		T496	14
values[68]	155	1			T836	1		T496	13		T930	1
values[69]	155	1			T836	1		T496	8		T930	1
values[70]	218	1			T836	1		T496	16		T930	1
values[71]	185	1			T836	1		T496	8		T930	1
values[72]	131	1			T836	1		T496	5		T930	1
values[73]	96	1			T836	1		T930	1		T775	8
values[74]	90	1			T836	1		T930	1		T775	7
values[75]	89	1			T836	1		T930	1		T775	7
values[76]	88	1			T836	1		T930	1		T775	4
values[77]	85	1			T836	1		T930	1		T775	4
values[78]	87	1			T836	1		T930	1		T775	7
values[79]	65	1			T836	1		T930	1		T775	3
values[80]	70	1			T836	1		T930	1		T775	2
values[81]	76	1			T836	1		T930	1		T463	1
values[82]	70	1			T836	1		T930	1		T463	1
values[83]	61	1			T836	1		T930	1		T463	1
values[84]	79	1			T836	1		T930	1		T463	1
values[85]	73	1			T836	1		T930	1		T463	1
values[86]	69	1			T836	1		T930	1		T463	1
values[87]	83	1			T836	1		T930	2		T463	1
values[88]	71	1			T836	1		T930	1		T463	1
values[89]	68	1			T836	1		T930	1		T463	1
values[90]	71	1			T836	1		T930	1		T463	1
values[91]	71	1			T836	1		T930	1		T463	1
values[92]	87	1			T836	1		T930	1		T463	1
values[93]	66	1			T836	1		T930	1		T463	1
values[94]	78	1			T836	1		T930	1		T463	1
values[95]	75	1			T836	1		T930	1		T463	1
values[96]	79	1			T836	1		T930	1		T463	1
values[97]	64	1			T836	1		T930	1		T463	1
values[98]	62	1			T836	1		T930	1		T463	1
values[99]	72	1			T836	1		T930	1		T463	1
values[100]	57	1			T836	1		T930	1		T463	1
values[101]	65	1			T836	1		T930	2		T463	1
values[102]	58	1			T836	1		T930	3		T463	1
values[103]	63	1			T836	1		T930	1		T463	1
values[104]	73	1			T836	1		T930	8		T463	2
values[105]	84	1			T836	1		T930	3		T463	2
values[106]	73	1			T836	1		T930	4		T463	2
values[107]	72	1			T836	1		T930	2		T463	2
values[108]	59	1			T836	1		T930	1		T463	3
values[109]	66	1			T836	1		T930	4		T463	3
values[110]	65	1			T836	1		T930	1		T463	3
values[111]	66	1			T836	1		T930	1		T463	5
values[112]	70	1			T836	1		T930	1		T463	2
values[113]	67	1			T836	1		T930	3		T463	1
values[114]	74	1			T836	1		T930	1		T463	2
values[115]	66	1			T836	1		T930	3		T463	3
values[116]	52	1			T836	1		T930	2		T463	1
values[117]	46	1			T836	1		T930	2		T463	4
values[118]	54	1			T836	1		T930	2		T463	1
values[119]	55	1			T836	1		T930	1		T463	2
values[120]	66	1			T836	1		T930	3		T463	1
values[121]	55	1			T836	1		T930	1		T463	1
values[122]	64	1			T836	1		T930	1		T463	2
values[123]	65	1			T836	1		T930	1		T463	1
values[124]	70	1			T836	2		T930	1		T463	1
values[125]	87	1			T836	1		T930	3		T463	1
values[126]	161	1			T836	1		T930	3		T463	1
values[127]	771	1			T836	25		T930	35		T463	32
values[128]	7200	1			T836	277		T930	310		T463	274