Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	151686	1			T73	147		T74	3		T78	24
values[2]	4115	1			T73	1		T557	7		T550	3
values[3]	1913	1			T836	1		T555	1		T931	1
values[4]	1441	1			T836	1		T555	1		T930	1
values[5]	1226	1			T836	1		T555	1		T930	1
values[6]	1038	1			T836	1		T555	1		T930	1
values[7]	927	1			T836	1		T555	1		T930	1
values[8]	744	1			T836	1		T555	1		T930	1
values[9]	617	1			T836	1		T555	1		T930	1
values[10]	513	1			T836	1		T555	1		T930	1
values[11]	580	1			T836	1		T555	1		T930	1
values[12]	526	1			T836	1		T555	1		T930	1
values[13]	476	1			T836	1		T555	1		T930	1
values[14]	369	1			T836	1		T555	1		T930	1
values[15]	380	1			T836	1		T555	1		T930	1
values[16]	392	1			T836	1		T555	1		T930	1
values[17]	422	1			T836	1		T555	1		T930	1
values[18]	383	1			T836	1		T555	1		T930	1
values[19]	277	1			T836	1		T555	1		T930	1
values[20]	239	1			T836	1		T555	1		T930	1
values[21]	290	1			T836	1		T555	1		T930	1
values[22]	242	1			T836	2		T555	1		T930	1
values[23]	210	1			T836	1		T555	1		T930	1
values[24]	178	1			T836	1		T555	1		T930	1
values[25]	129	1			T836	1		T555	1		T930	1
values[26]	122	1			T836	1		T555	1		T930	1
values[27]	120	1			T836	1		T555	1		T930	1
values[28]	135	1			T836	1		T555	1		T930	1
values[29]	128	1			T836	1		T555	1		T930	1
values[30]	125	1			T836	1		T555	1		T930	1
values[31]	127	1			T836	1		T555	1		T930	1
values[32]	112	1			T836	1		T555	1		T930	1
values[33]	86	1			T836	1		T555	1		T930	1
values[34]	71	1			T836	1		T555	1		T930	1
values[35]	86	1			T836	1		T555	1		T930	1
values[36]	118	1			T836	1		T555	1		T930	1
values[37]	98	1			T836	1		T555	1		T930	1
values[38]	75	1			T836	1		T555	1		T930	1
values[39]	74	1			T836	1		T555	1		T930	1
values[40]	75	1			T836	1		T555	1		T930	1
values[41]	75	1			T836	1		T555	1		T930	1
values[42]	67	1			T836	1		T555	1		T930	1
values[43]	60	1			T836	1		T555	2		T930	1
values[44]	78	1			T836	1		T555	1		T930	1
values[45]	54	1			T836	1		T555	1		T930	1
values[46]	42	1			T836	1		T555	1		T930	1
values[47]	45	1			T836	1		T555	1		T930	1
values[48]	44	1			T836	1		T555	1		T930	1
values[49]	50	1			T836	1		T555	1		T930	1
values[50]	53	1			T836	1		T555	1		T930	1
values[51]	58	1			T836	1		T555	1		T930	1
values[52]	50	1			T836	1		T555	1		T930	1
values[53]	45	1			T836	1		T555	1		T930	1
values[54]	48	1			T836	1		T555	1		T930	1
values[55]	51	1			T836	1		T555	1		T930	1
values[56]	50	1			T836	1		T555	1		T930	1
values[57]	46	1			T836	1		T555	1		T930	1
values[58]	48	1			T836	1		T555	1		T930	1
values[59]	46	1			T836	1		T555	1		T930	1
values[60]	48	1			T836	1		T555	1		T930	1
values[61]	48	1			T836	1		T555	1		T930	1
values[62]	51	1			T836	1		T555	1		T930	1
values[63]	55	1			T836	1		T555	1		T930	1
values[64]	57	1			T836	1		T555	1		T930	1
values[65]	46	1			T836	1		T555	1		T930	1
values[66]	44	1			T836	1		T555	1		T930	1
values[67]	40	1			T836	1		T555	1		T930	1
values[68]	52	1			T836	1		T555	1		T930	2
values[69]	48	1			T836	1		T555	1		T930	1
values[70]	48	1			T836	1		T555	1		T930	1
values[71]	47	1			T836	1		T555	1		T930	1
values[72]	44	1			T836	1		T555	1		T930	1
values[73]	62	1			T836	1		T555	1		T930	1
values[74]	54	1			T836	1		T555	1		T930	1
values[75]	60	1			T836	1		T555	1		T930	1
values[76]	52	1			T836	1		T555	1		T930	1
values[77]	64	1			T836	1		T555	1		T930	1
values[78]	48	1			T836	1		T555	1		T930	1
values[79]	66	1			T836	1		T555	1		T930	1
values[80]	79	1			T836	1		T555	1		T930	1
values[81]	44	1			T836	1		T555	1		T930	1
values[82]	51	1			T836	1		T555	1		T930	1
values[83]	46	1			T836	1		T555	1		T930	1
values[84]	54	1			T836	1		T555	1		T930	1
values[85]	68	1			T836	1		T555	1		T930	1
values[86]	70	1			T836	1		T555	1		T930	1
values[87]	75	1			T836	1		T555	1		T930	1
values[88]	78	1			T836	1		T555	1		T930	1
values[89]	61	1			T836	1		T555	1		T930	1
values[90]	71	1			T836	1		T555	1		T930	1
values[91]	64	1			T836	1		T555	1		T930	1
values[92]	72	1			T836	1		T555	1		T930	1
values[93]	57	1			T836	1		T555	1		T930	2
values[94]	66	1			T836	6		T555	1		T930	1
values[95]	77	1			T836	4		T555	1		T930	1
values[96]	69	1			T836	2		T555	1		T930	1
values[97]	68	1			T836	5		T555	1		T930	1
values[98]	82	1			T836	6		T555	1		T930	1
values[99]	64	1			T836	2		T555	1		T930	1
values[100]	69	1			T836	3		T555	1		T930	1
values[101]	70	1			T836	5		T555	3		T930	1
values[102]	68	1			T836	4		T555	1		T930	1
values[103]	77	1			T836	2		T555	2		T930	1
values[104]	71	1			T836	1		T555	3		T930	1
values[105]	73	1			T836	1		T555	2		T930	1
values[106]	89	1			T836	2		T555	9		T930	1
values[107]	94	1			T836	1		T555	6		T930	1
values[108]	73	1			T836	1		T555	6		T930	1
values[109]	89	1			T836	4		T555	2		T930	1
values[110]	88	1			T836	1		T555	1		T930	1
values[111]	85	1			T836	1		T555	2		T930	1
values[112]	88	1			T836	2		T555	2		T930	1
values[113]	63	1			T836	2		T555	1		T930	2
values[114]	104	1			T836	1		T555	2		T930	1
values[115]	83	1			T836	3		T555	1		T930	2
values[116]	77	1			T836	1		T555	2		T930	1
values[117]	81	1			T836	3		T555	1		T930	1
values[118]	97	1			T836	2		T555	2		T930	2
values[119]	92	1			T836	1		T555	4		T930	4
values[120]	110	1			T836	5		T555	3		T930	2
values[121]	91	1			T836	1		T555	3		T930	3
values[122]	88	1			T836	1		T555	5		T930	2
values[123]	101	1			T836	2		T555	2		T930	2
values[124]	230	1			T836	4		T555	2		T930	3
values[125]	328	1			T836	1		T555	2		T930	1
values[126]	688	1			T836	11		T555	7		T930	9
values[127]	2090	1			T836	127		T555	111		T930	102
values[128]	3471	1			T836	228		T555	231		T930	260